VIPER53DIP-E datasheet(20/36 Pages) STMICROELECTRONICS

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Standby mode

VIPer53 - E

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Standby mode

The device offers a special feature to address the low load condition. The corresponding

function described hereafter consists of reducing the switching frequency by going into burst

mode, with the following benefits:

– It reduces the switching losses, thus providing low consumption on the mains lines.

The device is compliant with “Blue Angel” and other similar standards, requiring less

than 0.5 W of input power when in standby.

– It allows the regulation of the output voltage, even if the load corresponds to a duty

cycle that the device is not able to generate because of the internal blanking time, and

associated minimum turn on.

For this purpose, a comparator monitores the COMP pin voltage, and maintains the PWM

latch and the Power MOSFET in the Off state as long as VCOMP remains below 0.5V (See

Block Diagram on page 1). If the output load requires a duty cycle below the one defined by

the minimum turn on of the device, the VCOMP net decreases its voltage until it reaches this

0.5V threshold (VCOMPoff). The Power MOSFET can be completely Off for some cycles, and

resumes normal operation as soon as VCOMP is higher than 0.5V. The output voltage is

regulated in burst mode. The corresponding ripple is not higher than the nominal one at full

load.

In addition, the minimum turn on time which defines the frontier between normal operation

and burst mode changes according to VCOMP value. Below 1.0V (VCOMPbl), the blanking

time increases to 400ns, whereas for higher voltages, it is 150ns Figure 6 on page 10 The

minimum turn on times resulting from these values are respectively 600 ns and 350 ns,

when taking into account internal propagation time. This brutal change induces an

hysteresis between normal operation and burst mode as shown on Figure 20 on page 21.

When the output power decreases, the system reaches point 2 where VCOMP equals

VCOMPbl. The minimum turn-on time passes immediately from 350ns to 600ns, exceeding

the effective turn-on time that should be needed at this output power level. Therefore the

regulation loop will quickly drive VCOMP to VCOMPoff (Point 3) in order to pass into burst

mode and to control the output voltage. The corresponding hysteresis can be seen on the

switching frequency which passes from FSWnom which is the normal switching frequency set

by the components connected to the OSC pin and to FSWstby. Note: This frequency is

actually an equivalent number of switching pulses per second, rather than a fixed switching

frequency since the device is working in burst mode.

As long as the power remains below PRST the output of the regulation loop remains stuck at

VCOMPsd and the converter works in burst mode. Its “density” increases (i.e. the number of

missing cycles decreases) as the power approaches PRST and finally resumes normal

operation at point 1. The hysteresis cannot be seen on the switching frequency, but it can be

seen in the sudden surge of the COMP pin voltage from point 3 to point 1 at that power level.

The power points value PRST and PSTBY are defined by the following formulas:

Equation 2

RST

---

SWnom

•

()

•

-------

•

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