AD640

REV.

D

–12–

can be adjusted by adding or subtracting a small current to the

output. Since the slope current is 1 mA/decade, a 50

µA incre-

ment will move the intercept by 1 dB. Note that any error in

this current will invalidate the calibration of the AD640. For

example, if one of the 5 V supplies were used with a resistor to

generate the current to reposition the intercept by 20 dB, a

±10% variation in this supply will cause a ±2 dB error in the

absolute calibration. Of course, slope calibration is unaffected.

Source Resistance and Input Offset

The bias currents at the signal inputs (Pins 1 and 20) are typi-

cally 7

µA. These flow in the source resistances and generate

input offset voltages which may limit the dynamic range because

the AD640 is direct coupled and an offset is indistinguishable

from a signal. It is good practice to keep the source resistances

as low as possible and to equalize the resistance seen at each

input. For example, if the source resistance to Pin 20 is 100

Ω, a

compensating resistor of 100

Ω should be placed in series with

Pin l. The residual offset is then due to the bias current offset,

which is typically under 1

µA, causing an extra offset uncertainty

of 100

µV in this example. For a single AD640 this will rarely be

troublesome, but in some applications it may need to be nulled

out, along with the internal voltage offset component. This may

be achieved by adding an adjustable voltage of up to

±250 µV at

the unused input. (Pins l and 20 may be interchanged with no

change in function.)

In most applications there will be no need to use any offset

adjustment. However, a general offset trimming circuit is shown

in Figure 25. RS is the source resistance of the signal. Note: 50

Ω

rf sources may include a blocking capacitor and have no dc path to

ground, or may be transformer coupled and have a near zero resis-

tance to ground. Determine whether the source resistance is zero,

25

Ω or 50 Ω (with the generator terminated in 50 Ω) to find

the correct value of bias compensating resistor, RB, which

should optimally be equal to RS, unless RS = 0, in which case

use RB = 5

Ω. The value of R

OS should be set to 20,000 RB to

provide a

±250 µV trim range. To null the offset, set the source

voltage to zero and use a DVM to observe the logarithmic out-

put voltage. Recall that the LOG OUT current of the AD640

exhibits an absolute value response to the input voltage, so the offset

potentiometer is adjusted to the point where the logarithmic output

“turns around” (reaches a local maximum or minimum).

–5V

(SOURCE RESISTANCE

OF TERMINATED

GENERATOR)

RB

19

20

12

AD640

ROS

RS

+5V

20k

Figure 25. Optional Input Offset Voltage Nulling Circuit;

See Text for Component Values

At high frequencies it may be desirable to insert a coupling

capacitor and use a choke between Pin 20 and ground, when

Pin 1 should be taken directly to ground. Alternatively, trans-

former coupling may be used. In these cases, there is no added

offset due to bias currents. When using two dc coupled AD640s

(overall gain 100,000), it is impractical to maintain a sufficiently

low offset voltage using a manual nulling scheme. The section

CASCADED OPERATION explains how the offset can be

automatically nulled to submicrovolt levels by the use of a nega-

tive feedback network.

Using Higher Supply Voltages

The AD640 is calibrated using

±5 V supplies. Scaling is very

insensitive to the supply voltages (see dc SPECIFICATIONS)

and higher supply voltages will not directly cause significant

errors. However, the AD640 power dissipation must be kept

below 500 mW in the interest of reliability and long-term stabil-

ity. When using well regulated supply voltages above

±6 V, the

decoupling resistors shown in the application schematics can be

increased to maintain

±5 V at the IC. The resistor values are

calculated using the specified maximum of 15 mA current into

the +VS terminal (Pin 12) and a maximum of 60 mA into the

–VS terminal (Pin 7). For example, when using

±9 V supplies, a

resistor of (9 V–5 V)/15 mA, about 261

Ω, should be included in

the +VS lead to each AD640, and (9 V–5 V)/60 mA, about 64.9

Ω,

in each –VS lead. Of course, asymmetric supplies may be dealt

with in a similar way.

Using the Attenuator

In applications where the signal amplitude is sufficient, the on-

chip attenuator should be used because it provides a tempera-

ture independent dynamic range (compare Figures 18 and 19).

Figure 26 shows this attenuator in more detail. R1 is a thin-film

resistor of nominally 270

Ω and low temperature coefficient

(TC). It is trimmed to calibrate the intercept to 10 mV dc (or

–24 dBm for sinusoidal inputs), that is, to an attenuation of

nominally 20 dBs at 27

°C. R2 has a nominal value of 30 Ω and

has a high positive TC, such that the overall attenuation factor

is 0.33%/

°C at 27°C. This results in a transmission factor that is

proportional to absolute temperature, or PTAT. (See Intercept

Stabilization for further explanation.) To improve the accuracy

of the attenuator, the ATN COM nodes are bonded to both

Pin 3 and Pin 4. These should be connected directly to the “SIG-

NAL LOW” of the source (for example, to the grounded side of

the signal connector, as shown in Figure 32) not to an arbitrary

point on the ground plane.

4

3

2

15

17

18

19

20

16

ATN

COM

SIG

–IN

SIG

+IN

ATN

COM

ATN

LO

ATN

IN

R3

R4

R1

R2

ATN

OUT

FIRST

AMPLIFIER

INPUT

AD640

Figure 26. Details of the Input Attenuator

R4 is identical to R2, and in shunt with R3 (270

Ω thin film)

forms a 27

Ω resistor with the same TC as the output resistance

of the attenuator. By connecting Pin 1 to ATN LOW (Pin 2)

this resistance minimizes the offset caused by bias currents. The

offset nulling scheme shown in Figure 25 may still be used, with

the external resistor RB omitted and ROS = 500 kΩ. Offset sta-

bility is improved because the compensating voltage introduced

at Pin 20 is now PTAT. Drifts of under 1

µV/°C (referred to

Pins 1 and 20) can be maintained using the attenuator.