AD640

REV.

D

–14–

15

13

14

16

19

18

17

11

12

20

6

8

7

5

3

4

10

9

1

2

SIG

+IN

ATN

OUT

CKT

COM

RG1 RG0 RG2 LOG

OUT

LOG

COM

+VS

SIG

+OUT

SIG

–IN

ATN

LO

ATN

COM

BL1

BL2

ITC

–VS

SIG

–OUT

1k

1k

ATN

COM

ATN

IN

U1 AD640

NC

R1

R2

NC

NC

15

13

14

16

19

18

17

11

12

20

6

8

7

5

3

4

10

9

1

2

SIG

+IN

ATN

OUT

CKT

COM

RG1 RG0 RG2 LOG

OUT

LOG

COM

+VS

SIG

+OUT

SIG

–IN

ATN

LO

ATN

COM

BL1

BL2

ITC

–VS

SIG

–OUT

1k

1k

ATN

COM

ATN

IN

U2 AD640

C1

47pF

R3

100

68

C2

47pF

R4

100

18

L1

(SEE

TEXT)

18

–6V

+6V

68

–6V

4.7

U3

AD844

LOG

OUTPUT

+50mV/dB

(LO)

+6V

4.7

DENOTES A CONNECTION TO THE GROUND PLANE;

OBSERVE COMMON CONNECTIONS WHERE SHOWN.

ALL UNMARKED CAPACITORS ARE 0.1 F CERAMIC.

SEE TEXT FOR VALUES OF NUMBERED COMPONENTS.

SIGNAL

INPUT

R13

1.13k

(SEE TEXT)

NC = NO CONNECT

Figure 30. Complete 70 dB Dynamic Range Converter for 50 MHz–150 MHz Operation

must be some resistance at Pins 1 and 20 across which the offset

compensation voltage is developed. The values shown in the

figure assume that we wish to terminate a 50

Ω source at Pin 20.

The 50

Ω resistor at Pin 1 is essential, both to minimize offsets

due to bias current mismatch and because the outputs at Pins

10 and 11 can only swing negatively (from ground to –180 mV)

whereas we need to cater for input offsets of either polarity.

For a sine input of 1

µV amplitude (–120 dBV) and in the

absence of offset, the differential voltage at Pins 10 and 11 of

U2 would be almost sinusoidal but 100,000 times larger, or

100 mV. The last limiter in U2 would be entering saturation. A

1

µV input offset added to this signal would put the last limiter

well into saturation, and its output would then have a different

average value, which is extracted by the low-pass network and

delivered back to the input. For larger signals, the output ap-

proaches a square wave for zero input offset and becomes rect-

angular when offset is present. The duty cycle modulation of

this output now produces the nonzero average value. Assume a

maximum required differential output of 100 mV (after averag-

ing in C1 and C2) as shown in Figure 29. R3 through R6 can

now be chosen to provide

±500 µV of correction range, and with

these values the input offset is reduced by a factor of 500. Using

4.7

µF capacitors, the time constant of the network is about

1.2 ms, and its corner frequency is at 13.5 Hz. The closed loop

high-pass corner (for small signals) is, therefore, at 1.35 MHz.

Bandwidth/Dynamic Range Trade-Offs

The first stage noise of the AD640 is 2 nV/

√Hz (short circuited

input) and the full bandwidth of the cascaded ten stages is about

150 MHz. Thus, the noise referred to the input is 24.5

µV rms,

or –79 dBm, which would limit the dynamic range to 77 dBs

(–79 dBm to –2 dBm). In practice, the source resistances will

also generate noise, and the full bandwidth dynamic range will

be less than this.

A low-pass filter between U1 and U2 can limit the noise band-

width and extend the dynamic range. The simplest way to do

this is by the addition of a pair of grounded capacitors at the

signal outputs of U1 (shown as C1 and C2 in Figure 32). The

20

1

11

10

U2

U1

AVE = –140mV

INPUT

R1

50

R2

50

AVE = –40mV

R3

4.99k

R5

4.99k

–200 V

–700 V

4 A

14 A

20

1

11

10

C1

C2

R4

4.99k

R6

4.99k

Figure 29. Feedback Offset Correction Network

–3 dB frequency of the filter must be above the highest fre

quency to be handled by the converter; if not, nonlinearity in

the transfer function will occur. This can be seen intuitively by

noting that the system would then contract to a single AD640 at

very high frequencies (when U2 has very little input). At inter-

mediate frequencies, U2 will contribute less to the output than

would be the case if there were no interstage attenuation, result-

ing in a kink in the transfer function.

More complex filtering may be considered. For example, if the

signal has a fairly narrow bandwidth, the simple chokes shown

in Figure 28 might be replaced by one or more parallel tuned

circuits. Two separate tuned circuits or transformer coupling

should be used to eliminate all undesirable hf common mode

coupling between U1 and U2. The choice of Q for these circuits

requires compromise. Frequency sensitive nonlinearities can

arise at the edges of the band if the Q is set too high; if too low,

the transmission of the signal from U1 to U2 will be affected

even at the center frequency, again resulting in nonlinearity in

the conversion response. In calculating the Q, note that the

resistance from Pins 10 and 11 to ground is 75

Ω. The input

resistance at Pins 1 and 20 is very high, but the capacitances at

these pins must also be factored into the total LCR circuit.

PRACTICAL APPLICATIONS

We show here two applications, using cascaded AD640s to

achieve a wide dynamic range. As already mentioned, the use of

a differential signal path and differential logarithmic outputs