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MB90F482 数据表(PDF) 67 Page - fujitsu semiconductor |
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MB90F482 数据表(HTML) 67 Page - fujitsu semiconductor |
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67 / 120 page ![]() MB90480/485 Series 67 15. Timebase Timer The timebase timer is an 18-bit free run counter (timebase counter) that counts up in synchronization with the internal count clock signal (base oscillator × 2) , and functions as an interval timer with a choice of four types of time intervals. Other functions provided by this module include timer output for the oscillator stabilization wait period, and operating clock signal feed for other timer circuits such as the watchdog timer. (1) Register List (2) Block Diagram Timebase timer control register (TBTC) 0000A9H Read/write Initial value ⎯ X ⎯ X R/W 0 R/W 0 W 1 R/W 0 R/W 0 15 14 13 12 11 10 9 8 ⎯ R/W 1 RESV ⎯ TBIE TBOF TBR TBC1 TBC0 OF OF OF OF × 21 × 22 × 28 × 29 × 210 × 211 × 212 × 213 × 214 × 215 × 216 × 217 × 218 ⎯⎯ RESV TBIE TBOF TBR TBC1 TBC0 Interval timer selector To PPG timer Timebase timer counter HCLK × 2 To watchdog timer Power-on reset Counter clear control circuit TBOF clear Timebase timer control register (TBTC) Timebase timer interrupt signal To clock control module oscillator stabilization wait time selector TBOF set OF : Overflow HCLK : Oscillator clock *1 : Switch machine clock from main clock or sub clock to PLL clock. *2 : Switch machine clock from sub clock to main clock. Stop mode start Hold status start CKSCR : MCS = 1→0*1 CKSCR : SCS = 0→1*2 |
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