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DA9081.006

1 August, 2005

MAS9081 SAMPLES IN SBDIL 20 PACKAGE

Top Marking Definitions:

YYWW = Year Week

XXXXX.X = Lot Number

z = Sample Version Number

NC 1

VDD 2

QO2 3

QO1 4

NC

5

NC

6

QI

7

AGC 8

PDN2 9

OUT 10

20 VSS

19 RFI2

18 RFIM

17 RFIP

16 NC

15 NC

14 PDN 1

13 AON

12 DEC

11 NC

PIN DESCRIPTION

Pin Name

Pin

Type

Function

Note

NC

1

VDD

2

P

Positive Power Supply

QO2

3

AO

Quartz Filter Output for Crystal 2

QO1

4

AO

Quartz Filter Output for Crystal 1

NC

5

1

NC

6

1

QI

7

AI

Quartz Filter Input for Crystals

AGC

8

AO

AGC Capacitor

PDN2

9

DI

Power Down/Frequency Selection Input 2

OUT

10

DO

Receiver Output

2

NC

11

DEC

12

AO

Demodulator Capacitor

AON

13

DI

AGC On Control

3

PDN1

14

DI

Power Down/Frequency Selection Input 1

NC

15

NC

16

RFIP

17

AI

Positive Receiver Input

4

RFIM

18

AI

Negative Receiver Input

4

RFI2

19

AI

Receiver Input 2 (for Antenna Capacitor 2)

VSS

20

G

Power Supply Ground

A = Analog, D = Digital, P = Power, G = Ground, I = Input, O = Output, NC = Not Connected

Notes:

1) Pins 5 and 6 between QO and QI must be connected to VSS to eliminate DIL package leadframe parasitic

capacitances disturbing the crystal filter performance. All other NC (Not Connected) pins are also

recommended to be connected to VSS to minimize noise coupling.

2) OUT = VSS when carrier amplitude at maximum; OUT = VDD when carrier amplitude is reduced

(modulated)

-

-

at power down the output is pulled to VSS (pull down switch)

3) AON = VSS means AGC off (hold current gain level); AON = VDD means AGC on (working)

-

Internal pull-up with current < 1 µA which is switched off at power down

4) Receiver inputs RFIP and RFIM have both 600 kΩ biasing MOSFET-transistors towards ground