数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

HV57708 数据表(PDF) 2 Page - Supertex, Inc

部件名 HV57708
功能描述  32MHz, 64-Channel Serial to Parallel Converter with Push-Pull Outputs
PDF  7 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  SUTEX [Supertex, Inc]
网页  http://www.supertex.com
标志 SUTEX - Supertex, Inc

HV57708 数据表(HTML) 2 Page - Supertex, Inc

  HV57708 Datasheet HTML 1Page - Supertex, Inc HV57708 Datasheet HTML 2Page - Supertex, Inc HV57708 Datasheet HTML 3Page - Supertex, Inc HV57708 Datasheet HTML 4Page - Supertex, Inc HV57708 Datasheet HTML 5Page - Supertex, Inc HV57708 Datasheet HTML 6Page - Supertex, Inc HV57708 Datasheet HTML 7Page - Supertex, Inc  
Zoom Inzoom in Zoom Outzoom out
 2 / 7 page
background image
2
HV57708
Ordering Information
Device
Package Options
80-Lead PQFP
HV57708
HV57708PG-G
-G indicates package is RoHS compliant (‘Green’)
Absolute Maximum Ratings
Parameter
Value
Supply voltage, V
DD
-0.5V to +7.5V
Output voltage , V
PP
-0.5V to +90V
Logic input levels
-0.3V to V
DD + 0.3V
Ground current(1)
1.5A
Continuous total power dissipation(2)
1200mW
Operating temperature range
-40°C to +85°C
Storage temperature range
-65°C to +150°C
Lead temperature 1.6mm from case
for 10 seconds
260°C
Absolute Maximum Ratings are those values beyond which damage to the
device may occur. Functional operation under these conditions is not implied.
Continuous operation of the device at the absolute rating level may affect
device reliability. All voltages are referenced to device ground.
Notes:
1. Limited by the total dissipated in the package.
2. For operation above 25°C ambient derate linearly to maximum
operating temperature at 20mW/°C.
Recommended Operating Conditions
Symbol
Parameter
Min
Max
Units
V
DD
Logic supply voltage
4.5
5.5
V
V
PP
Output voltage
8.0
80
V
V
IH
High-level input voltage
V
DD - 0.5V
-
V
V
IL
Low-level input voltage
0
0.5
V
f
CLK
Clock frequency per register
-
8.0
MHz
T
A
Operating free-air temperature
-40
+85
°C
Notes:
Power-up sequence should be the following*:
1. Apply ground
2. Apply V
DD
3. Set all inputs (D
IN, CLK, LE , POL, etc.) to a known state
4. Apply V
PP
5. The V
PP should not drop below VDD or float during operation
Power-down sequence should be the reverse of the above
Pin Configuration
80-Lead PQFP (PG)
(top view)
1
80
YY = Year Sealed
WW = Week Sealed
L = Lot Number
C = Country of Origin*
A = Assembler ID*
= “Green” Packaging
*May be part of top marking
Top Marking
Bottom Marking
YYWW
HV57708PG
LLLLLLLLLL
CCCCCCCC
AAA
Product Marking
80-Lead PQFP (PG)



Html Pages

1 2 3 4 5 6 7


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com