12

 2005 Semtech Corp.

www.semtech.com

SC4607

POWER MANAGEMENT

voltage according to

)

R

R

1

(

5

.

0

V

9

7

out

+

⋅

=

Figure 4. Compensation network provides 3

poles and 2 zeros.

C2

R1

C1

C4

R

Vout

L1

C9

R8

R7

R9

VCC

ISET

COMP

FS/SY NC

BST

DRVH

DRVL

VSENSE

GND

PHASE

SC4607

Figure 4. Compensation network provides 3

poles and 2 zeros.

C2

R1

C1

C4

R

Vout

L1

C9

R8

R7

R9

VCC

ISET

COMP

FS/SY NC

BST

DRVH

DRVL

VSENSE

GND

PHASE

SC4607

Figure 5. Compensation network provides 3 poles and

2 zeros.

For voltage mode step down applications as shown in

Figure 5, the power stage transfer function is:

4

1

2

1

4

C

I

VD

C

L

s

R

L

s

1

C

R

1

s

1

V

)

s

(

G

+

+

⋅

+

=

Where:

R = load resistance and

R

The compensation network will have the characteristic

as follows:

2

P

2

Z

1

P

1

Z

I

COMP

s

1

s

1

s

1

s

1

s

)

s

(

G

ω

+

⋅

ω

+

⋅

ω

+

ω

+

⋅

ω

=

Where

)

C

C

(

R

1

2

1

7

I

+

⋅

=

ω

2

1

1

Z

C

R

1

⋅

=

ω

9

8

7

2

Z

C

)

R

R

(

1

⋅

+

=

ω

Application Information (Cont.)

bottom MOSFET, its switching voltage is the body diode’s

forward drop of the bottom MOSFET during its on/off

transition. So the switching loss for the bottom MOSFET

is negligible. Its total power loss can be determined by:

F

AVG

D

s

GATE

GB

ON

_

BOT

RMS

_

BOT

2

TOTAL

_

BOT

V

_

I

f

V

Q

R

I

P

⋅

+

⋅

⋅

+

⋅

=

Where:

Q

V

bottom MOSFET.

For a low voltage and high output current application such

as the 3.3V/1.5V@12A case, the conduction loss is of-

ten dominant and selecting low R

ticeably improve the efficiency of the converter even

though they give higher switching losses.

The gate charge loss portion of the top/bottom MOSFET’s

total power loss is derived from the SC4607. This gate

charge loss is based on certain operating conditions (f

V

The thermal estimations have to be done for both

MOSFETs to make sure that their junction temperatures

do not exceed their thermal ratings according to their

total power losses P

thermal resistance R

θ

JA

TOTAL

A

(max)

J

R

P

T

T

θ

+

<

Loop Compensation Design:

For a DC/DC converter, it is usually required that the

converter has a loop gain of a high cross-over frequency

for fast load response, high DC and low frequency gain

for low steady state error, and enough phase margin for

its operating stability. Often one can not have all these

properties at the same time. The purpose of the loop

compensation is to arrange the poles and zeros of the

compensation network to meet the requirements for a

specific application.

The SC4607 has an internal error amplifier and requires

the compensation network to connect among the COMP

pin and VSENSE pin, GND, and the output as shown in

Figure 5. The compensation network includes C1, C2,

R1, R7, R8 and C9. R9 is used to program the output