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SH3003 数据表(PDF) 10 Page - Semtech Corporation |
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SH3003 数据表(HTML) 10 Page - Semtech Corporation |
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10 / 30 page ![]() 10 ©2006 Semtech Corp. SH3003 www.semtech.com Not authorized for release outside of Semtech - DRAFT POWER MANAGEMENT Parameter Min Typ Max Units VBO for min code (000000) 2.27 2.3 2.33 V VBO for max code (111111) 4.2 4.3 4.4 V Step resolution 33 mV Application Information (continued) CPU Supervisor The SH3003 has two supervisory functions that man- age the reset of the target processor, a low VDD monitor (Brownout Detector) and a Watchdog Timer, see Figure 1. Both functions are integrated with the Clock Management System to provide a more complete system solution than stand-alone components. The SH3003 has both active high and active low reset output pins. Both are driven strong to the active state and weak to the inactive state. This eliminates the need for ex- ternal pull-ups and allows various reset sources to be con- nected together in a wire-OR configuration. (This makes it simple to set up a manual reset circuit.) A set of flags in the register map indicates the source of the reset to the system software. Table 1 Low VDD Reset The SH3003 drives the reset pins active whenever VDD is below the value of VBO, the brownout reset threshold, pro- grammable from 2.3V to 4.3V in average steps of 33mV, see Table 1. The default VBO value is loaded on power-up from the fac- tory-programmed non-volatile memory. It can be re-pro- grammed at any time or it can be permanently protected from any changes by setting the VBO Lock flag or a write- protect flag. Figure 1. CPU Supervisor --- Low VDD / Brownout Detector, Watchdog, Reset logic & Drivers Noise Filter 3 VDD VHIGH VLOW Threshold D/A 4.40 V 2.30 V Hysteresis 50mV TYP. Reset Logic & Minimum Duration Timer PWROK Temperature- compensated Voltage Reference 10 N RST 11 RST VDD 20K 20K UNDERFLOW 1 0 32kHz 256 32 kHz CLKOUT 7-bit Down Counter 128 Mode 6-bit Value 7-bit Watchdog Timeout Value Watchdog Reload Control Alternating Codes Logic 0x5A / 0xC3 Load From / To Serial I/O Write-once Initialization Logic Lock Logic RESET RESET |
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