Register description

LIS202DL

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7

Register description

The device contains a set of registers which are used to control its behavior and to retrieve

acceleration data. The registers address, made of 7 bits, is used to identify them and to

write the data through serial interface.

7.1

WHO_AM_I (0Fh)

Device identification register.

This register contains the device identifier that for LIS202DL is set to 3Bh.

7.2

CTRL_REG1 (20h)

DR bit allows to select the data rate at which acceleration samples are produced. The

default value is 0 which corresponds to a data-rate of 100Hz. By changing the content of DR

to “1” the selected data-rate will be set equal to 400Hz.

PD bit allows to turn on the turn the device out of power-down mode. The device is in power-

down mode when PD= “0” (default value after boot). The device is in normal mode when PD

is set to 1.

Table 9.

Register

0

011

10

11

Table 10.

Register

DR

PD

FS

STP

STM

1.

Bit to be set to “0” for correct device functionality

Yen

Xen

Table 11.

Register description

DR

Data rate selection. Default value: 0

(0: 100 Hz output data rate; 1: 400 Hz output data rate)

PD

Power Down Control. Default value: 0

(0: power down mode; 1: active mode)

FS

Full scale selection. Default value: 0

(refer to Table 2 for typical full scale value)

STP, STM

Self Test Enable. Default value: 00

(0: normal mode; 1: self test P, M enabled)

Yen

Y axis enable. Default value: 1

(0: Y axis disabled; 1: Y axis enabled)

Xen

X axis enable. Default value: 1

(0: X axis disabled; 1: X axis enabled)