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LIS202DL 数据表(PDF) 22 Page - STMicroelectronics |
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LIS202DL 数据表(HTML) 22 Page - STMicroelectronics |
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22 / 36 page ![]() Register description LIS202DL 22/36 7.4 CTRL_REG3 [Interrupt CTRL register] (22h) Table 14. Truth table HPcoeff2,1 ft (Hz) (ODR=100 Hz) ft (Hz) (ODR=400 Hz) 00 2 8 01 1 4 10 0.5 2 11 0.25 1 Table 15. Register IHL PP_OD I2CFG2 I2CFG1 I2CFG0 I1CFG2 I1CFG1 I1CFG0 Table 16. Register description IHL Interrupt active high, low. Default value 0. (0: active high; 1: active low) PP_OD Push-pull/Open Drain selection on interrupt pad. Default value 0. (0: push-pull; 1: open drain) I2CFG2 I2CFG1 I2CFG0 Data Signal on Int2 pad control bits. Default value 000. (see table below) I1CFG2 I1CFG1 I1CFG0 Data Signal on Int1 pad control bits. Default value 000. (see table below) Table 17. Truth table I1(2)_CFG2 I1(2)_CFG1 I1(2)_CFG0 Int1(2) Pad 0 0 0 GND 001 WU_1 010 WU_2 0 1 1 WU_1 or WU_2 1 0 0 Data Ready 1 1 1 Click Interrupt |
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