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QST108 数据表(PDF) 17 Page - STMicroelectronics

部件名 QST108
功能描述  Capacitive touch sensor device 8 keys with individual key state outputs or I2C interface
PDF  38 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

QST108 数据表(HTML) 17 Page - STMicroelectronics

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QST108
Device operating modes
17/38
4.5.3
IRQ pin
The IRQ pin is an open drain output with an internal pull-up. This pin (available in I2C mode
only) can be used to inform the Master device about any change in the key status. The IRQ
line is pulled low every time the state of any of the enabled keys changes. This includes any
change in the touch state of the key or faulty key. The reported changes may then be
accessed by the Master device by using the GET_KEY_STATE command.
To improve communication response time, this signal suspends Low Power mode until the
Master device has issued a communication with the QST device.
4.5.4
Communication packet
The communication between the Master device and the QST108 (Slave) consists of two
standard I2C frames.
The first frame is sent by the Master device using the QST108 device address with the write
bit set. The data bytes consist of the command byte which is eventually followed by the
parameters and a checksum byte.
The second one is sent by the Master device using the QST108 device address with the
write bit reset. The QST108 complete the frame with data according to the command
previously sent by the Master device. The device finishes the frame by sending a checksum
byte for communication integrity verification.
The QST108 slave address is programmable using the option resistors mapped on pins
OPT2 to OPT4 (see Table 9).
If the read frame is omitted, the command may not be taken into account.
To initiate the communicate with the QST108, the Master device must send the
GET_DEVICE_INFO command in order to unlock access to all the other commands.
Table 9.
I²C address versus option resistor
Option configuration
I2C Address
OPT4
OPT3
OPT2
ADD[6:3]
ADD2
ADD1
ADD0
Hex value
VSS
VSS
VSS
0101
0
0
0
0x48
VSS
VSS
VDD
0
0
1
0x49
VSS
VDD
VSS
0
1
0
0x4A
VSS
VDD
VDD
0
1
1
0x4B
VDD
VSS
VSS
1
0
0
0x4C
VDD
VSS
VDD
1
0
1
0x4D
VDD
VDD
VSS
1
1
0
0x4E
VDD
VDD
VDD
1
1
1
0x4F



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