L6566ATR datasheet(33/51 Pages) STMICROELECTRONICS

33 / 51 page

L6566A

Application information

33/51

Figure 20. Operation after latched disable activation: timing diagram

5.10

Soft-start and delayed latched shutdown upon overcurrent

At device start-up, a capacitor (Css) connected between the SS pin (14) and ground is

charged by an internal current generator, ISS1, from zero up to about 2V where it is clamped.

During this ramp, the overcurrent setpoint progressively rises from zero to the value

imposed by the voltage on the VFF pin (15, see “PWM Comparator, PWM Latch and Voltage

Feedforward blocks

”); MOSFET’s conduction time increases gradually, hence controlling the

start-up inrush current. The time needed for the overcurrent setpoint to reach its steady

state value, referred to as soft-start time, is approximately:

Equation 9

During the ramp (i.e. until VSS = 2 V) all the functions that monitor the voltage on pin COMP

are disabled.

The soft-start pin is also invoked whenever the control voltage (COMP) saturates high,

which reveals an open-loop condition for the feedback system. This condition very often

occurs at start-up, but may be also caused by either a control loop failure or a converter

overload/short circuit. A control loop failure results in an output overvoltage that is handled

by the OVP function of the L6566A (see next section). In case of QR operation, a short

circuit causes the converter to run at a very low frequency, then with very low power

capability. This makes the self-supply system that powers the device unable to keep it

Vcc

(pin 5)

(pin 4)

Vin

VccON

VccON -0.5

4.5V

VccOFF

DIS

(pin 8)

Vccrestart

VHVstart

HV generator is turned on

HV generator turn-on is disabled here

Input source is removed here

Vcc_PFC

(pin 6)

AC_OK

(pin 16)

Vth

Disable latch is reset here

Restart is quicker

⎟⎟⎠

⎞

⎜⎜⎝

⎛ −

Css

)

(

Css

VFF

csx

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