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ST7263BH2T1 数据表(PDF) 110 Page - STMicroelectronics |
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ST7263BH2T1 数据表(HTML) 110 Page - STMicroelectronics |
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110 / 145 page ![]() ST7263BDx ST7263BHx ST7263BKx ST7263BE 110/145 14.3 Operating conditions 14.3.1 General operating conditions Figure 51. fCPU maximum operating frequency versus VDD supply voltage 14.3.2 Operating conditions with Low Voltage Detector (LVD) Subject to general operating conditions for VDD, fCPU, and TA. Refer to Figure 12 on page 24. Notes: 1. The VDD rise time rate condition is needed to insure a correct device power-on and LVD reset. Not tested in production. 2. Guaranteed by characterization - not tested in production Symbol Parameter Conditions Min Typ Max Unit VDD Operating Supply Voltage fCPU = 8 MHz 45 5.5 V VDDA Analog reference voltage VDD VDD VSSA Analog reference voltage VSS VSS fCPU Operating frequency fOSC = 24 MHz 8 MHz fOSC = 12 MHz 4 TA Ambient temperature range 070 °C Symbol Parameter Conditions Min Typ Max Unit VIT+ Low Voltage Reset Threshold (VDD rising) VDD Max. Variation 50V/ms 3.4 3.7 4.0 V VIT- Low Voltage Reset Threshold (VDD falling) VDD Max. Variation 50V/ms 3.2 3.5 3.8 V Vhyst Hysteresis (VIT+ - VIT-) 2) 100 175 220 mV VtPOR VDD rise time rate 1) 0.5 50 V/ms fCPU [MHz] SUPPLY VOLTAGE [V] 8 4 2 0 2.5 3.0 3.5 4 4.5 5 5.5 FUNCTIONALITY FUNCTIONALITY GUARANTEED FROM 4 TO 5.5 V NOT GUARANTEED IN THIS AREA |
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