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AS8267 数据表(PDF) 19 Page - ams AG |
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AS8267 数据表(HTML) 19 Page - ams AG |
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19 / 136 page ![]() Data Sheet AS8267 / AS8268 Revision 1.0, 19-Jun-07 Page 19 of 136 Voltage Input for Energy Calculation The voltage channel input consisting of inputs VP and VN which are differential, with VP connected to the tap of a resistor divider circuit of the line voltage and VN connected to VSSA. For optimum operating conditions, the input signal at VP should be set at 100mVp for the rated voltage condition. The resistor values for an ideal voltage divider may be calculated as follows: Assuming a Vmains of 230V (rms) → 325V (peak) and R2 = 470Ω (according to the voltage divider shown below), the value of R1A+R1B may be calculated as follows: V mains R1A+R1B R2 V in Ω = − × Ω = − × = + M 53 . 1 mV 100 mV 100 V 325 470 V ) V V ( 2 R B 1 R A 1 R ) P ( in ) P ( in mains thus R1A = 820k Ω and R1B = 750kΩ resistors may be selected. The mains voltage is also sampled at 3.4956kHz, assuming that the recommended crystal oscillator frequency of 3.5795MHz is used. Digital Signal Processing Block (DSP) The digital signal processing (DSP) block provides the signal processing required to ensure that the specified measured accuracy is performed and that the microcontroller (MCU) is provided with the appropriate data and protocol to perform all the required meter functions. For the description below, please refer to the following block diagram (Figure 3). The DSP makes allowance for phase correction of the two current channels (i1 and i2) within the Sinc 3 decimation filters in the phase correction block. The applicable phase correction setting (pcorr_i1 or pcorr_i2) is selected (sel_i), depending upon which current (i1 or i2) is being used for the power calculation. The equalization filters on the voltage and current channels which may be by-passed (sel_equ), correct for the attenuation introduced by the decimation filters at the edge of the input frequency band, while the high pass filters, which may also be by-passed (sel_hp), eliminate any DC offsets introduced into the input channels. Independent calibration of the voltage (cal_v) and current signals (cal_i1 and cal_i2) is done after the voltage and current signals are provided for power calculation. This ensures that calibration of the voltage (sos_v), current channel 1 (sos_i1), current channel 2 (sos_i2) has no influence on the power (np) calibration. |
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