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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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STW5098 数据表(PDF) 57 Page - STMicroelectronics |
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STW5098 数据表(HTML) 57 Page - STMicroelectronics |
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57 / 85 page  STw5098 Audio interfaces 57/85 Table 33. Audio interface signal timings Symbol Parameter Test conditions Min. Typ. Max. Unit t DSY Delay of AD_SYNC/DA_SYNC edge from AD_CK/DA_CK active edge Master Mode 10 ns tSDDA Setup time DA_DATA to DA_CK active edge 10 ns tHDDA Hold time DA_DATA from DA_CK active edge 10 ns tDAD Delay of AD_DATA edge from AD_CK active edge 30 ns tDADST Delay of the first AD_DATA edge from AD_SYNC active edge AD_SYNC active edge comes after AD_CK active edge 30 ns tDADZ Delay of AD_DATA high impedance from AD_SYNC inactive edge PCM format 10 50 ns tSSY Setup time AD_SYNC/DA_SYNC to AD_CK/DA_CK active edge Slave Mode 20 ns tHSY Hold time AD_SYNC/DA_SYNC from AD_CK/DA_CK active edge Slave Mode 20 ns tPCK Period of AD_CK/DA_CK Slave Mode 100 ns tHCK AD_CK/DA_CK pulse width high Measured from VIH to VIH 40 ns tLCK AD_CK/DA_CK pulse width low Measured from VIL to VIL 40 ns |
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