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STW5098 数据表(PDF) 41 Page - STMicroelectronics |
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STW5098 数据表(HTML) 41 Page - STMicroelectronics |
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41 / 85 page  STw5098 Control registers 41/85 5.6 Digital audio interfaces master mode and clock generators CR# (hex) Description D7 D6D5 D4 D3D2 D1D0 Def. CR20 (14h) DAOCK frequency LSB DAOCKF(7:0) 0000 0000 CR21 (15h) DAOCK frequency MSB DAOCKF(15:8) 0000 0000 CR22 (16h) DA clock generator control X X DAMAST DA MASTGEN END OCK DAO CK512 DAPCMF(1:0) 0000 0000 CR23 (17h) ADOCK frequency LSB ADOCKF(7:0) 0000 0000 CR24 (18h) ADOCK frequency MSB ADOCKF(15:8) 0000 0000 CR25 (19h) AD clock generator control X X ADMAST AD MASTGEN ENA DOCK ADO CK512 ADPCMF(1:0) 0000 0000 Table 18. CR21-20 and CR24-23 description Bits Name CR21-20 Name CR24-23 Value CR21-20 and CR24-23 Description Def. 15-0 DAOCKF(15:0) ADOCKF(15:0) K The following formulas can be used to obtain the value of K for the desired FS or OCK respectively in the clock generator FS: Data rate (DA_SYNC or AD_SYNC frequency in master mode) OCK: Oversampled clock frequency (DA_OCK or AD_OCK) AMCK: Input master clock frequency MCKCOEFF: See CR30 for definition OSR: See bit 2 in CR22 and CR25 0000h Note: CR21-20 and CR24-23 are meaningful in master mode only. KFS () round 2 25 FS AMCK MCKCOEFF ⋅ -------------------------------------------------------------- ⎝⎠ ⎛⎞ = KOCK () roun d 2 25 OC K AMCK MCKCOEFF OSR ⋅ ⋅ ------------------------------------------------------------------------------------ ⎝⎠ ⎛⎞ = Table 19. CR22 and CR25 description Bits Name CR22 (Name CR25) Value CR22 and CR25 description Def. 5 DAMAST (ADMAST) 1 0 DA (AD) Audio interface is in master mode (low impedance output) DA (AD) Audio interface is in slave mode (high impedance input) 0 4 DAMASTGEN (ADMASTGEN) 1 0 DA (AD) Master generator is enabled DA (AD) Master generator is disabled 0 3 ENDAOCK (ENADOCK) 1 0 DA_OCK (AD_OCK) output clock is enabled DA_OCK (AD_OCK) output clock is disabled 0 |
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