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TLC3548CPWR 数据表(PDF) 1 Page - Texas Instruments |
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TLC3548CPWR 数据表(HTML) 1 Page - Texas Instruments |
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1 / 42 page  1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 SCLK FS SDI EOC/INT SDO DGND DVDD CS A0 A1 A2 A3 CSTART AVDD AGND BGAP REFM REFP AGND AVDD A7 A6 A5 A4 TLC3548 DW OR PW PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 SCLK FS SDI EOC/INT SDO DGND DVDD CS A0 A1 CSTART AVDD AGND BGAP REFM REFP AGND AVDD A3 A2 TLC3544 DW OR PW PACKAGE (TOP VIEW) TLC3544, TLC3548 5-V ANALOG, 3-/5-V DIGITAL, 14-BIT, 200-KSPS, 4-/8-CHANNELS SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH 0-5 V (PSEUDODIFFERENTIAL) INPUTS SLAS266C – OCTOBER 2000 – REVISED MAY 2003 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D 14-Bit Resolution D Maximum Throughput 200 KSPS D Analog Input Range 0-V to Reference Voltage D Multiple Analog Inputs: – 8 Channels for TLC3548 – 4 Channels for TLC3544 D Pseudodifferential Analog Inputs D SPI/DSP-Compatible Serial Interfaces With SCLK up to 25 MHz D Single 5-V Analog Supply; 3-/5-V Digital Supply D Low Power: – 4 mA (Internal Reference: 1.8 mA) for Normal Operation – 20 µA in Autopower-Down D Built-In 4-V Reference, Conversion Clock and 8x FIFO D Hardware-Controlled and Programmable Sampling Period D Programmable Autochannel Sweep and Repeat D Hardware Default Configuration D INL: ±1 LSB Max D DNL: ±1 LSB Max D SINAD: 80.8 dB D THD: –95 dB description The TLC3544 and TLC3548 are a family of 14-bit resolution high-performance, low-power, CMOS analog-to-digital converters (ADC). All devices operate from a single 5-V analog power supply and 3-V to 5-V digital supply. The serial interface consists of four digital inputs [chip select (CS), frame sync (FS), serial input-output clock (SCLK), serial data input (SDI)], and a 3-state serial data output (SDO). CS (works as SS, slave select), SDI, SDO, and SCLK form an SPI interface. FS, SDI, SDO, and SCLK form a DSP interface. The frame sync signal (FS) indicates the start of a serial data frame being transferred. When multiple converters connect to one serial port of a DSP, CS works as the chip select to allow the host DSP to access the individual converter. CS can be tied to ground if only one converter is used. FS must be tied to DVDD if it is not used (such as in an SPI interface). When SDI is tied to DVDD, the device is set in hardware default mode after power-on, and no software configuration is required. In the simplest case, only three wires (SDO, SCLK, and CS or FS) are needed to interface with the host. Copyright 2000 – 2003, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. |
类似零件编号 - TLC3548CPWR |
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类似说明 - TLC3548CPWR |
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