STR71XF_07 datasheet(23/77 Pages) STMICROELECTRONICS

23 / 77 page

STR71xF

System architecture

23/77

1)CANTX and CANRX in STR712F only, in STR715F they are general purpose I/Os.

Legend / abbreviations for Table 6:

Type:

I = input, O = output, S = supply, HiZ= high impedance,

In/Output level: C = CMOS 0.3VDD/0.7VDD

CT= CMOS 0.8V / 2V with input trigger

TT= TTL 0.3V/0.7VDD with input trigger

C/T = Programmable levels: CMOS 0.3VDD/0.7VDD or TTL 0.8V / 2V

Port and control configuration:

Input:

pu/pd= software enabled internal pull-up or pull down

pu= in reset state, the internal 100k

Ω weak pull-up is enabled.

pd = in reset state, the internal 100k

Ω weak pull-down is enabled.

Output:

OD = open drain (logic level)

PP = push-pull

T = true OD, (P-Buffer and protection diode to VDD not implemented),

5V tolerant.

Table 5.

STR712/715 BGA Ball Connections

ABCD

P0.10

P0.11

P0.12

P0.14

V33

JTCK

TEST

V33IO-

PLL

P0.9

VSS

P0.13

VSS

JTMS

JTRSTn

P0.15

VSSIO-

PLL

P0.5

P0.7

BOOTEN

JTDI

STDBY

RTCXTI

VSS18

VSS

P0.8

JTDO

AVDD

V18BKP

RSTIN

RTCXTO

P0.2

P0.4

V18

P0.6

P1.9

P1.0

V18

VSSBKP

V33

P0.1

P0.3

P1.13

P1.11/

CANRX1)

VSSIO-

PLL

AVSS

VSS18

VSS

P0.0

P1.10

P1.12/

CANTX1)

P1.7

P1.6

P1.5

P1.1

P1.15

P1.14

VSS

P1.8

V33IO-

PLL

P1.4

P1.3

P1.2

STR71XF 数据表(PDF) 23 Page - STMicroelectronics

STR71XF 数据表(HTML) 23 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77

数据表下载