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ST7GEME4 数据表(PDF) 13 Page - STMicroelectronics |
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ST7GEME4 数据表(HTML) 13 Page - STMicroelectronics |
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13 / 28 page ![]() ST7GEME4 Electrical characteristics 13/28 4 Electrical characteristics 4.1 Absolute maximum ratings The ST7GEME4 contains circuitry to protect the inputs against damage due to high static voltages. However it is advisable to take normal precautions to avoid applying any voltage higher than the specified maximum rated voltages. For proper operation it is recommended that VI and VO be higher than VSS and lower than VDD. Reliability is enhanced if unused inputs are connected to an appropriate logic voltage level (VDD or VSS). Power considerations The average chip-junction temperature, TJ, in Celsius can be obtained by the following equation: where: TA = Ambient temperature RthJA = Package thermal resistance (junction-to ambient) PD = PINT + PPORT PINT = IDD x VDD (chip internal power) PPORT = Port power dissipation determined by the user Stresses above those listed as “absolute maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these conditions is not implied. Exposure to maximum rating for extended periods may affect device reliability. Warning: Direct connection to VDD or VSS of the I/O pins could damage the device in case of program counter corruption (due to unwanted change of the I/O configuration). To guarantee safe conditions, this connection has to be done through a typical 10k Ω pull-up or pull-down resistor. Table 4. Absolute maximum ratings Symbol Ratings Value Unit VDD - VSS Supply voltage 6.0 V VIN Input voltage VSS - 0.3 to VDD + 0.3 V VOUT Output voltage VSS - 0.3 to VDD + 0.3 V ESD ESD susceptibility 2000 V ESDCard ESD susceptibility for card pads 4000 V IVDD_i Total current into VDD_i (source) 250 mA IVSS_i Total current out of VSS_i (sink) 250 T J T A PD RthJA × + = |
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