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Advanced CMOS TTL Input – 74ACT74 

Rev 1.0

21/11/19

DC Electrical Characteristics Continued (Voltages referenced to GND)

7. Maximum test duration 2ms, one output loaded at a time.

LIMITS

PARAMETER

SYMBOL

VCC

CONDITIONS

25°C

85°C

FULL RANGE

4

UNITS

4.5V

4.4

4.4

4.4

5.5V

IOUT = -50µA

5.4

5.4

5.4

V

4.5V

3.86

3.76

3.76

5.5V

VIN = VIL or VIH

5

IOL = -24mA

4.86

4.76

4.76

V

4.5V

-

-

3.85

Minimum High-Level

Output Voltage

VOH

5.5V

VIN = VIL or VIH

5,6

IOL = -75mA

-

-

3.85

V

Maximum Input

Leakage Current

IIN

5.5V

VIN = VCC or GND

±0.1

±1.0

±1.0

µA

Additional Maximum

ICC / Input

ΔICCT

5.5V

VIN = VCC -2.1V

0.6

1.5

1.5

mA

IOLD

5.5V

VOLD = 1.65V Max

-

75

75

Minimum Dynamic

Output Current

7

IOHD

5.5V

VOHD = 3.85V Min

-

-75

-75

mA

Maximum Quiescent

Supply Leakage

Current

ICC

5.5V

VIN = VCC or GND

IOUT = 0µA

4

40

40

µA

 

8. Not production tested in die form, characterized by chip design and tested in package.

9. Used to determine the no-load dynamic power consumption: PD = CPD VCC

2f + ICC VCC.

AC Electrical Characteristics8

LIMITS

PARAMETER

SYMBOL

VCC

CONDITIONS

25°C

85°C

FULL RANGE

4

UNITS

Maximum Clock

Frequency

fmax

5V ±10%

-

145

125

125

MHz

tPLH,

11

13

13

Maximum

Propagation Delay,

CLK to Q or Q

(Figure1)

tPHL

5V ±10%

CL = 50pF,

Input tr = tf = 3ns

10

11.5

11.5

ns

tPLH,

9.5

10.5

10.5

Maximum

Propagation Delay,

PRE or CLR

to Q or Q

(Figure 2)

tPHL

5V ±10%

CL = 50pF,

Input tr = tf = 3ns

10

11.5

11.5

ns

Maximum Input

Capacitance

CIN

5V ±10%

VIN = VCC or

GND

4.5

4.5

4.5

pF

TYPICAL

Power Dissipation

Capacitance

9

CPD

-

TJ = 25°C,

VCC =5.0V

35

pF