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P912XDP512F0MPVR 数据表(PDF) 65 Page - Freescale Semiconductor, Inc |
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P912XDP512F0MPVR 数据表(HTML) 65 Page - Freescale Semiconductor, Inc |
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65 / 1350 page ![]() Chapter 1 Device Overview MC9S12XD-Family MC9S12XDP512 Data Sheet, Rev. 2.17 Freescale Semiconductor 65 1.2.3.62 PS5 / MOSI0 — Port S I/O Pin 5 PS5 is a general-purpose input or output pin. It can be configured as master output (during master mode) or slave input pin (during slave mode) MOSI of the serial peripheral interface 0 (SPI0). 1.2.3.63 PS4 / MISO0 — Port S I/O Pin 4 PS4 is a general-purpose input or output pin. It can be configured as master input (during master mode) or slave output pin (during slave mode) MOSI of the serial peripheral interface 0 (SPI0). 1.2.3.64 PS3 / TXD1 — Port S I/O Pin 3 PS3 is a general-purpose input or output pin. It can be configured as the transmit pin TXD of serial communication interface 1 (SCI1). 1.2.3.65 PS2 / RXD1 — Port S I/O Pin 2 PS2 is a general-purpose input or output pin. It can be configured as the receive pin RXD of serial communication interface 1 (SCI1). 1.2.3.66 PS1 / TXD0 — Port S I/O Pin 1 PS1 is a general-purpose input or output pin. It can be configured as the transmit pin TXD of serial communication interface 0 (SCI0). 1.2.3.67 PS0 / RXD0 — Port S I/O Pin 0 PS0 is a general-purpose input or output pin. It can be configured as the receive pin RXD of serial communication interface 0 (SCI0). 1.2.3.68 PT[7:0] / IOC[7:0] — Port T I/O Pins [7:0] PT[7:0] are general-purpose input or output pins. They can be configured as input capture or output compare pins IOC[7:0] of the enhanced capture timer (ECT). 1.2.4 Power Supply Pins MC9S12XDP512 power and ground pins are described below. NOTE All VSS pins must be connected together in the application. 1.2.4.1 VDDX1, VDDX2, VSSX1,VSSX2 — Power and Ground Pins for I/O Drivers External power and ground for I/O drivers. Because fast signal transitions place high, short-duration current demands on the power supply, use bypass capacitors with high-frequency characteristics and place them as close to the MCU as possible. Bypass requirements depend on how heavily the MCU pins are loaded. |
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