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P912XDP512F0MPVR 数据表(PDF) 96 Page - Freescale Semiconductor, Inc |
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P912XDP512F0MPVR 数据表(HTML) 96 Page - Freescale Semiconductor, Inc |
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96 / 1350 page ![]() Chapter 2 Clocks and Reset Generator (S12CRGV6) MC9S12XDP512 Data Sheet, Rev. 2.17 96 Freescale Semiconductor 2.3.2.10 Reserved Register (FORBYP) NOTE This reserved register is designed for factory test purposes only, and is not intended for general user access. Writing to this register when in special modes can alter the CRG’s functionality. Read: Always read 0x_00 except in special modes Write: Only in special modes 2.3.2.11 Reserved Register (CTCTL) NOTE This reserved register is designed for factory test purposes only, and is not intended for general user access. Writing to this register when in special test modes can alter the CRG’s functionality. Read: always read 0x_80 except in special modes Write: only in special modes 76543210 R 00000000 W Reset 00000000 = Unimplemented or Reserved Figure 2-13. Reserved Register (FORBYP) 76543210 R 10000000 W Reset 00000000 = Unimplemented or Reserved Figure 2-14. Reserved Register (CTCTL) |
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