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P912XDP512F0MPVR 数据表(PDF) 174 Page - Freescale Semiconductor, Inc |
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P912XDP512F0MPVR 数据表(HTML) 174 Page - Freescale Semiconductor, Inc |
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174 / 1350 page  Chapter 5 Analog-to-Digital Converter (S12ATD10B8CV3) MC9S12XDP512 Data Sheet, Rev. 2.17 174 Freescale Semiconductor Table 5-14. Available Result Data Formats SRES8 DJM DSGN Result Data Formats Description and Bus Bit Mapping 1 1 1 0 0 0 0 0 1 0 0 1 0 1 X 0 1 X 8-bit / left justified / unsigned — bits 8–15 8-bit / left justified / signed — bits 8–15 8-bit / right justified / unsigned — bits 0–7 10-bit / left justified / unsigned — bits 6–15 10-bit / left justified / signed — bits 6–15 10-bit / right justified / unsigned — bits 0–9 Table 5-15. Left Justified, Signed, and Unsigned ATD Output Codes Input Signal VRL = 0 Volts VRH = 5.12 Volts Signed 8-Bit Codes Unsigned 8-Bit Codes Signed 10-Bit Codes Unsigned 10-Bit Codes 5.120 Volts 5.100 5.080 2.580 2.560 2.540 0.020 0.000 7F 7F 7E 01 00 FF 81 80 FF FF FE 81 80 7F 01 00 7FC0 7F00 7E00 0100 0000 FF00 8100 8000 FFC0 FF00 FE00 8100 8000 7F00 0100 0000 Table 5-16. Analog Input Channel Select Coding CC CB CA Analog Input Channel 0 0 0 AN0 0 0 1 AN1 0 1 0 AN2 0 1 1 AN3 1 0 0 AN4 1 0 1 AN5 1 1 0 AN6 1 1 1 AN7 |
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