P912XDP512F0MFVR datasheet(261/1350 Pages) FREESCALE

部件名	P912XDP512F0MFVR

功能描述	Covers, S12XD, S12XB & S12XA Families

PDF	1350 Pages

Scroll/Zoom	100%

制造商	FREESCALE [Freescale Semiconductor, Inc]

网页	http://www.freescale.com

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261 / 1350 page

Chapter 6 XGATE (S12XGATEV2)

MC9S12XDP512 Data Sheet, Rev. 2.17

Freescale Semiconductor

261

Operation

M[RB, #OFFS5

] ⇒ RD

M[RB, RI

] ⇒ RD

M[RB, RI]

⇒ RD; RI+2 ⇒ RI1

RI-2

⇒ RI; M[RS, RI] ⇒ RD

IMM16

⇒ RD (translates to LDL RD, #IMM16[7:0]; LDH RD, #IMM16[15:8])

Loads a 16 bit value into the register RD.

CCR Effects

Code and CPU Cycles

LDW

Load Word from Memory

LDW

1. If the same general purpose register is used as index (RI) and destination register (RD), the content of the register will not be

incremented after the data move: M[RB, RI]

⇒ RD

————

Not affected.

Source Form

Address

Mode

Machine Code

Cycles

LDW RD, (RB, #OFFS5)

IDO5

OFFS5

LDW RD, (RB, RI)

IDR

LDW RD, (RB, RI+)

IDR+

LDW RD, (RB, -RI)

-IDR

LDW RD, #IMM16

IMM8

IMM16[7:0]

IMM8

IMM16[15:8]

P912XDP512F0MFVR 数据表(PDF) 261 Page - Freescale Semiconductor, Inc

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