P912XDP512F0MFVR datasheet(274/1350 Pages) FREESCALE

274 / 1350 page

Chapter 6 XGATE (S12XGATEV2)

MC9S12XDP512 Data Sheet, Rev. 2.17

274

Freescale Semiconductor

Operation

RS1 - RS2 - C

⇒ RD

Subtracts the content of register RS2 and the value of the Carry bit from the content of register RS1 using

binary subtraction and stores the result in the destination register RD. Also the zero ﬂag is carried forward

from the previous operation allowing 32 and more bit subtractions.

Example:

SUB

R6,R4,R2

SBC

R7,R5,R3

; R7:R6 = R5:R4 - R3:R2

BCC

; conditional branch on 32 bit subtraction

CCR Effects

Code and CPU Cycles

SBC

Subtract with Carry

SBC

∆∆∆∆

Set if bit 15 of the result is set; cleared otherwise.

Set if the result is $0000 and Z was set before this operation; cleared otherwise.

Set if a two´s complement overﬂow resulted from the operation; cleared otherwise.

RS1[15] & RS2[15] & RD[15]new | RS1[15] & RS2[15] & RD[15]new

Set if there is a carry from bit 15 of the result; cleared otherwise.

RS1[15] & RS2[15] | RS1[15] & RD[15]new | RS2[15] & RD[15]new

Source Form

Address

Mode

Machine Code

Cycles

SBC RD, RS1, RS2

TRI

RS1

RS2

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