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P912XDP512F0MFVR 数据表(PDF) 319 Page - Freescale Semiconductor, Inc |
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P912XDP512F0MFVR 数据表(HTML) 319 Page - Freescale Semiconductor, Inc |
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319 / 1350 page  Chapter 7 Enhanced Capture Timer (S12ECT16B8CV2) MC9S12XDP512 Data Sheet, Rev. 2.17 Freescale Semiconductor 319 7.3.2.2 Timer Compare Force Register (CFORC) Read or write: Anytime but reads will always return 0x0000 (1 state is transient). All bits reset to zero. 7.3.2.3 Output Compare 7 Mask Register (OC7M) Read or write: Anytime All bits reset to zero. 76543210 R 00000000 W FOC7 FOC6 FOC5 FOC4 FOC3 FOC2 FOC1 FOC0 Reset 00000000 Figure 7-4. Timer Compare Force Register (CFORC) Table 7-3. CFORC Field Descriptions Field Description 7:0 FOC[7:0] Force Output Compare Action for Channel 7:0 — A write to this register with the corresponding data bit(s) set causes the action which is programmed for output compare “x” to occur immediately. The action taken is the same as if a successful comparison had just taken place with the TCx register except the interrupt flag does not get set. Note: A successful channel 7 output compare overrides any channel 6:0 compares. If a forced output compare on any channel occurs at the same time as the successful output compare, then the forced output compare action will take precedence and the interrupt flag will not get set. 76543210 R OC7M7 OC7M6 OC7M5 OC7M4 OC7M3 OC7M2 OC7M1 OC7M0 W Reset 00000000 Figure 7-5. Output Compare 7 Mask Register (OC7M) Table 7-4. OC7M Field Descriptions Field Description 7:0 OC7M[7:0] Output Compare Mask Action for Channel 7:0 0 The corresponding OC7Dx bit in the output compare 7 data register will not be transferred to the timer port on a successful channel 7 output compare, even if the corresponding pin is setup for output compare. 1 The corresponding OC7Dx bit in the output compare 7 data register will be transferred to the timer port on a successful channel 7 output compare. Note: The corresponding channel must also be setup for output compare (IOSx = 1) for data to be transferred from the output compare 7 data register to the timer port. |
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