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P912XDP512F0MFVR 数据表(PDF) 455 Page - Freescale Semiconductor, Inc |
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P912XDP512F0MFVR 数据表(HTML) 455 Page - Freescale Semiconductor, Inc |
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455 / 1350 page ![]() Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3) MC9S12XDP512 Data Sheet, Rev. 2.17 Freescale Semiconductor 455 10.3.3.4 Transmit Buffer Priority Register (TBPR) This register defines the local priority of the associated message buffer. The local priority is used for the internal prioritization process of the MSCAN and is defined to be highest for the smallest binary number. The MSCAN implements the following internal prioritization mechanisms: • All transmission buffers with a cleared TXEx flag participate in the prioritization immediately before the SOF (start of frame) is sent. • The transmission buffer with the lowest local priority field wins the prioritization. In cases of more than one buffer having the same lowest priority, the message buffer with the lower index number wins. Read: Anytime when TXEx flag is set (see Section 10.3.2.7, “MSCAN Transmitter Flag Register (CANTFLG)”) and the corresponding transmit buffer is selected in CANTBSEL (see Section 10.3.2.11, “MSCAN Transmit Buffer Selection Register (CANTBSEL)”). Write: Anytime when TXEx flag is set (see Section 10.3.2.7, “MSCAN Transmitter Flag Register (CANTFLG)”) and the corresponding transmit buffer is selected in CANTBSEL (see Section 10.3.2.11, “MSCAN Transmit Buffer Selection Register (CANTBSEL)”). 10.3.3.5 Time Stamp Register (TSRH–TSRL) If the TIME bit is enabled, the MSCAN will write a time stamp to the respective registers in the active transmit or receive buffer right after the EOF of a valid message on the CAN bus (see Section 10.3.2.1, Table 10-33. Data Length Codes Data Length Code Data Byte Count DLC3 DLC2 DLC1 DLC0 0000 0 0001 1 0010 2 0011 3 0100 4 0101 5 0110 6 0111 7 1000 8 76543210 R PRIO7 PRIO6 PRIO5 PRIO4 PRIO3 PRIO2 PRIO1 PRIO0 W Reset: 00000000 Figure 10-36. Transmit Buffer Priority Register (TBPR) |
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