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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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P912XDP512F0MFVR 数据表(PDF) 603 Page - Freescale Semiconductor, Inc |
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P912XDP512F0MFVR 数据表(HTML) 603 Page - Freescale Semiconductor, Inc |
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603 / 1350 page  Chapter 16 Interrupt (S12XINTV1) MC9S12XDP512 Data Sheet, Rev. 2.17 Freescale Semiconductor 603 16.3.1.3 Interrupt Request Configuration Address Register (INT_CFADDR) Read: Anytime Write: Anytime Address: 0x0127 76543210 R INT_CFADDR[7:4] 0000 W Reset 00010000 = Unimplemented or Reserved Figure 16-5. Interrupt Configuration Address Register (INT_CFADDR) Table 16-5. INT_CFADDR Field Descriptions Field Description 7–4 INT_CFADDR[7:4] Interrupt Request Configuration Data Register Select Bits — These bits determine which of the 128 configuration data registers are accessible in the 8 register window at INT_CFDATA0–7. The hexadecimal value written to this register corresponds to the upper nibble of the lower byte of the interrupt vector, i.e., writing 0xE0 to this register selects the configuration data register block for the 8 interrupt vector requests starting with vector (vector base + 0x00E0) to be accessible as INT_CFDATA0–7. Note: Writing all 0s selects non-existing configuration registers. In this case write accesses to INT_CFDATA0–7 will be ignored and read accesses will return all 0. |
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