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MU9C8328A-RDC 数据表(PDF) 8 Page - MUSIC Semiconductors |
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MU9C8328A-RDC 数据表(HTML) 8 Page - MUSIC Semiconductors |
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8 / 16 page ![]() MU9C8328A Ethernet Interface Rev. 0.8 Draft 8 UPDATE OP-CODE REGISTER (1000) Bit Mnemonic Description 15-0 UOC Contains the Op-Code to be used for updating the time stamp on a SA match Default is 0300H (NOP). To update time stamp write 0328H (MOV HM, CR) to this register. FUNCTIONAL DESCRIPTION Continued STATUS REGISTER (0001) Bit Mnemonic Description 15–8 Reserved. 7 COL 1 = Collision detected. 6 LOC 1 = Loss of carrier detected. 5 BUSY 1 = Network port is busy using the LANCAM. 4 MATCH 1 = A match was found. 3 FULL 1 = The LANCAM is full. 2 DAM 1 = A Destination Address match was found. 1 SAM 1 = A Source Address match was found. 0 REJECT 1 = The frame was rejected. LEARN OP-CODE REGISTER (0010) Bit Mnemonic Description 15–0 ALOC Contains the Op-Code to be used for an auto-learn, if enabled. Default is 0334H (MOV NF, CR, V), but can be overwritten. Table 2: Register Descriptions Continued PURGE OP-CODE REGISTER (1001) Bit Mnemonic Description 15-0 POC Contains the Op-Code to be used for the purge routine. Default is 043DH (VBC ALM,E). TIME STAMP REGISTER (1010) Bit Mnemonic Description 15-8 NEW_TS The value used for time stamp updates. 7-0 OLD_TS The value used to purge old entries. |
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