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WM8580 数据表(PDF) 22 Page - Wolfson Microelectronics plc |
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WM8580 数据表(HTML) 22 Page - Wolfson Microelectronics plc |
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22 / 97 page ![]() WM8580 Production Data w PD Rev 4.3 August 2007 22 DIGITAL AUDIO INTERFACES Audio data is transferred to and from the WM8580 via the digital audio interfaces. There are two receive audio interfaces and two transmit audio interfaces. The digital routing options for these interfaces are described on page 22. Control of the audio interfaces is described below. MASTER AND SLAVE MODES The audio interfaces require both a left-right-clock (LRCLK) and a bit-clock (BCLK). These can be supplied externally (slave mode) or they can be generated internally (master mode). When in master mode, the BCLKs and LRCLKs for an interface are output on the corresponding BCLK and LRCLK pins. By default, all interfaces operate in slave mode, but can operate in master mode by setting the PAIFTXMS, PAIFRXMS and SAIFMS register bits. In Hardware Control Mode, the PAIF Transmitter can operate in master mode by setting the SDI pin. Figure 12 Slave Mode Figure 13 Master Mode |
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