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Copyright 1999-2007 DCD – Digital Core Design. All Rights Reserved.

http://www.DigitalCoreDesign.com

Home and automotive radio

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I

ver 3.08

OVERVIEW

provides a simple and efficient method of data

transmission over a short distance between

many devices. The DI2CM core provides an

interface between a microprocessor / micro-

master transmitter or master receiver depend-

ing on working mode determined by micro-

processor/microcontroller. The DI2CM core

incorporates all features required by the latest

tion, arbitration, multi-master systems and

High-speed transmission mode. Built-in timer

allows operation from a wide range of the clk

frequencies.

KEY FEATURES

Master operation

Master transmitter

Master receiver

Support for all transmission speeds

Standard (up to 100 kb/s)

Fast (up to 400 kb/s)

High Speed (up to 3,4 Mb/s)

Arbitration and clock synchronization

Support for multi-master systems

Support for both 7-bit and 10-bit address-

Interrupt generation

Build-in 8-bit timer for data transfers speed

adjusting

Host side interface dedicated for micro-

processors/microcontrollers

User-defined timing (data setup, start

setup, start hold, etc.)

Fully synthesizable

Static synchronous design with positive

edge clocking and synchronous reset

No internal tri-states

Scan test ready

APPLI C ATIONS

Embedded microprocessor boards

Consumer and professional audio/video

Low-power applications

Communication systems

Cost-effective reliable automotive systems

DELIVERABLES

Source code:

VHDL Source Code or/and

VERILOG Source Code or/and

Encrypted, or plain text EDIF netlist

VHDL & VERILOG test bench environ-

ment

Active-HDL automatic simulation macros

ModelSim automatic simulation macros

Tests with reference responses

Technical documentation

Installation notes