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Cost-effective reliable automotive sys-

tems

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I

ver 3.02

OVERVIEW

provides a simple and efficient method of

data transmission over a short distance be-

tween many devices. The DI2CS core pro-

vides an interface between a microprocessor

as a slave transmitter or slave receiver de-

pending on working mode determined by a

master device. The DI2CS core incorporates

cation including clock synchronization, arbi-

tration and High-speed transmission mode.

The DI2CS supports all the transmission

speed modes.

KEY FEATURES

Slave operation

Slave transmitter

Slave receiver

Supports 3 transmission speed modes

Standard (up to 100 kb/s)

Fast (up to 400 kb/s)

High Speed (up to 3,4 Mb/s)

Allows operation from a wide range of

input clock frequencies

Simple interface allows easy connection

to microprocessor/microcontroller devices

Interrupt generation

User-defined data setup time

Fully synthesizable

Static synchronous design with positive

edge clocking and synchronous reset

No internal tri-states

Scan test ready

APPLI C ATIONS

Embedded microprocessor boards

Consumer and professional audio/video

Home and automotive radio

Low-power applications

Communication systems

DELIVERABLES

Source code:

VHDL Source Code or/and

VERILOG Source Code or/and

Encrypted, or plain text EDIF netlist

VHDL & VERILOG test bench environ-

ment

Active-HDL automatic simulation mac-

ros

ModelSim automatic simulation macros

Tests with reference responses

Technical documentation

Installation notes

HDL core specification

Datasheet

Synthesis scripts

Example application

Technical support