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are trademarks of their respective owners.

http://www.dcd.pl

Copyright 1999-2007 DCD – Digital Core Design. All Rights Reserved.

http://www.DigitalCoreDesign.com

Communication systems

D

B

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I

ver 1.15

OVERVIEW

provides a simple and efficient method of

data transmission over a short distance be-

tween many devices. The DI2CSB provides

an interface between a passive target device

e.g. memory, LCD display, pressure sensors

etc. and an I2C bus. It can works as a slave

receiver or transmitter depending on working

mode determined by a master device. Very

simple interface, composed with the read,

write and data signals, allows easy connec-

tion to the target devices. The core doesn’t

required programming and is ready to work

after power up/reset. The read, write, burst

read, burst write and repeated start transmis-

sions are automatically recognized by the

core. The core incorporates all features re-

ports the following transmission modes:

Standard, Fast and High Speed.

KEY FEATURES

Slave operation

Slave transmitter

Slave receiver

Supports 3 transmission speed modes

Standard (up to 100 kb/s)

Fast (up to 400 kb/s)

High Speed (up to 3,4 Mb/s)

Allows operation from a wide range of

input clock frequencies

Support for reads, writes, burst reads,

burst writes, and repeated start

7-bit addressing

No programming required

Simple interface allows easy connection

to target device e.g. memory, LCD dis-

play, pressure sensors etc.

Fully synthesizable

Static synchronous design with positive

edge clocking and synchronous reset

No internal tri-states

Scan test ready

APPLI C ATIONS

Embedded microprocessor boards

Consumer and professional audio/video

Home and automotive radio

Low-power applications

Cost-effective reliable automotive sys-

tems

DELIVERABLES

Source code:

VHDL Source Code or/and

VERILOG Source Code or/and

Encrypted, or plain text EDIF netlist

VHDL & VERILOG test bench environ-

ment

Active-HDL automatic simulation mac-

ros

ModelSim automatic simulation macros