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SN75176ADE4 数据表(PDF) 5 Page - Texas Instruments |
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SN75176ADE4 数据表(HTML) 5 Page - Texas Instruments |
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5 / 19 page ![]() SN75176A DIFFERENTIAL BUS TRANSCEIVER SLLS100A – JUNE 1984 – REVISED MAY 1995 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DRIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VIK Input clamp voltage II = – 18 mA – 1.5 V VOH High level output voltage VIH = 2 V, VIL = 0.8 V, 37 V VOH High-level output voltage IH , IOH = – 33 mA IL , 3.7 V VOL Low level output voltage VIH = 2 V, VIL = 0.8 V, 11 V VOL Low-level output voltage IH , IOH = 33 mA IL , 1.1 V |VOD1| Differential output voltage IO = 0 2VOD2 V |VOD2| Differential output voltage RL = 100 Ω, See Figure 1 2 2.7 V |VOD2| Differential output voltage RL = 54 Ω, See Figure 1 1.5 2.4 V ∆|VOD| Change in magnitude of differential output voltage ‡ ±0.2 V VOC Common-mode output voltage§ RL = 54 Ω or 100 Ω, See Figure 1 3 V ∆|VOC| Change in magnitude of common-mode output ±02 V ∆|VOC| gg voltage ‡ ±0.2 V IO Output current Output disabled, VO = 12 V 1 mA IO Output current , See Note 3 VO = – 7 V – 0.8 mA IIH High-level input current VI = 2.4 V 20 µA IIL Low-level input current VI = 0.4 V – 400 µA VO = – 7 V – 250 IOS Short-circuit output current VO = VCC 250 mA VO = 12 V 500 ICC Supply current (total package) No load Outputs enabled 35 50 mA ICC Supply current (total package) No load Outputs disabled 26 40 mA † All typical values are at VCC = 5 V and TA = 25°C. ‡ ∆|VOD| and ∆|VOC| are the changes in magnitude of VOD and VOC respectively, that occur when the input is changed from a high level to a low level. § In ANSI Standard EIA/TIA-422-B, VOC, which is the average of the two output voltages with respect to GND, is called output offset voltage, VOS. NOTE 3: This applies for both power on and off; refer to ANSI Standard EIA/TIA-422-B for exact conditions. switching characteristics, VCC = 5 V, TA = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT td(OD) Differential-output delay time RL =60 Ω See Figure 3 40 60 ns tt(OD) Differential-output transition time RL = 60 Ω, See Figure 3 65 95 ns tPZH Output enable time to high level RL = 110 Ω, See Figure 4 55 90 ns tPZL Output enable time to low level RL = 110 Ω, See Figure 5 30 50 ns tPHZ Output disable time from high level RL = 110 Ω, See Figure 4 85 130 ns tPLZ Output disable time from low level RL = 110 Ω, See Figure 5 20 40 ns |
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