SN75176A

DIFFERENTIAL BUS TRANSCEIVER

SLLS100A – JUNE 1984 – REVISED MAY 1995

7

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

2

RL

VOD2

VOC

2

RL

VOL

VOH

–IOH

+IOL

VID

0 V

3 V

VOLTAGE WAVEFORMS

tt(OD)

td(OD)

1.5 V

10%

tt(OD)

≈ 2.5 V

≈ – 2.5 V

90%

50%

Output

td(OD)

0 V

3 V

1.5 V

Input

TEST CIRCUIT

Output

CL = 50 pF

(see Note B)

50

Ω

RL = 60 Ω

Generator

(see Note A)

50%

10%

CL

NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns,

ZO = 50 Ω.

B. CL includes probe and jig capacitance.

Figure 3. Driver Test Circuit and Voltage Waveforms

VOLTAGE WAVEFORMS

tPHZ

1.5 V

2.3 V

0.5 V

0 V

3 V

tPZH

Output

Input

1.5 V

S1

0 or 3 V

Output

CL = 50 pF

(see Note B)

TEST CIRCUIT

50

Ω

VOH

Voff ≈ 0 V

RL = 110 Ω

Generator

(see Note A)

NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns,

ZO = 50 Ω.

B. CL includes probe and jig capacitance.

Figure 4. Driver Test Circuit and Voltage Waveforms