数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

ADPL42002ACPZN1.8-R7 数据表(PDF) 7 Page - Analog Devices

部件名 ADPL42002ACPZN1.8-R7
功能描述  20V, 200mA, Low Noise, CMOS LDO Linear Regulator
PDF  22 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADPL42002ACPZN1.8-R7 数据表(HTML) 7 Page - Analog Devices

Back Button ADPL42002ACPZN1.8-R7 Datasheet HTML 3Page - Analog Devices ADPL42002ACPZN1.8-R7 Datasheet HTML 4Page - Analog Devices ADPL42002ACPZN1.8-R7 Datasheet HTML 5Page - Analog Devices ADPL42002ACPZN1.8-R7 Datasheet HTML 6Page - Analog Devices ADPL42002ACPZN1.8-R7 Datasheet HTML 7Page - Analog Devices ADPL42002ACPZN1.8-R7 Datasheet HTML 8Page - Analog Devices ADPL42002ACPZN1.8-R7 Datasheet HTML 9Page - Analog Devices ADPL42002ACPZN1.8-R7 Datasheet HTML 10Page - Analog Devices ADPL42002ACPZN1.8-R7 Datasheet HTML 11Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 22 page
background image
Data Sheet
ADPL42002
analog.com
Rev. 1
7 of 22
Maximum TJ is calculated from the TA and PD using the formula.
TJ = TA + (PD × θJA)
(1)
θJA of the package is based on modeling and calculation using a 4-layer board. The θJA is highly dependent on the
application and board layout. In applications where high maximum power dissipation exists, close attention to
thermal board design is required. The value of θJA may vary depending on PCB material, layout, and environmental
conditions. The specified values of θJA are based on a 4-layer, 4 inches x 3 inches circuit board. See JESD51-7 and
JESD51-9 for detailed information on the board construction.
ΨJB is the junction-to-board thermal characterization parameter with units of °C/W. The ΨJB of the package is based
on modeling and calculation using a 4-layer board. The JESD51-12, Guidelines for Reporting and Using Electronic
Package Thermal Information, states that thermal characterization parameters are not the same as thermal
resistances. ΨJB measures the component power flowing through multiple thermal paths rather than a single path,
as in thermal resistance (θJB). Therefore, ΨJB thermal paths include convection from the top of the package as well
as radiation from the package, factors that make ΨJB more useful in real-world applications. Maximum TJis
calculated from the board temperature (TB) and PD using the formula.
TJ = TB + (PD × ΨJB)
(2)
See JESD51-8 and JESD51-12 for more detailed information about ΨJB.
Thermal Resistance
θJA, θJC, and ΨJB are specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-
mount packages.
Table 4. Thermal Resistance
Package Type
θJA
θJC
ΨJB
UNIT
6-Lead LFCSP
72.1
42.3
47.1
°C/W
8-Lead SOIC
52.7
41.5
32.7
°C/W
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can
discharge without detection. Although this product features patented or proprietary
protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore,
proper ESD precautions should be taken to avoid performance degradation or loss of
functionality.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com