PCF8563BSSLASH4 datasheet(8/45 Pages) NXP

8 / 45 page

PCF8563

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Product data sheet

Rev. 11 — 26 October 2015

8 of 45

NXP Semiconductors

PCF8563

Real-time clock/calendar

[1]

Bits labeled as N should always be written with logic 0.

[2]

Default value.

8.3.2.1

Interrupt output

Bits TF and AF: When an alarm occurs, AF is set to logic 1. Similarly, at the end of a

timer countdown, TF is set to logic 1. These bits maintain their value until overwritten

using the interface. If both timer and alarm interrupts are required in the application, the

source of the interrupt can be determined by reading these bits. To prevent one flag being

overwritten while clearing another, a logic AND is performed during a write access.

Bits TIE and AIE: These bits activate or deactivate the generation of an interrupt when

TF or AF is asserted, respectively. The interrupt is the logical OR of these two conditions

when both AIE and TIE are set.

3AF

0[2]

read: alarm flag inactive

Section 8.3.2.1

write: alarm flag is cleared

read: alarm flag active

write: alarm flag remains unchanged

2TF

0[2]

read: timer flag inactive

write: timer flag is cleared

read: timer flag active

write: timer flag remains unchanged

1AIE

0[2]

alarm interrupt disabled

alarm interrupt enabled

0TIE

0[2]

timer interrupt disabled

timer interrupt enabled

Table 6.

Control_status_2 - control and status register 2 (address 01h) bit description …continued

Bit

Symbol

Value

Description

Reference

When bits TIE and AIE are disabled, pin INT will remain high-impedance.

Fig 5.

Interrupt scheme

013aaa087

COUNTDOWN COUNTER

AF: ALARM

FLAG

CLEAR

SET

to interface:

read AF

TF: TIMER

CLEAR

SET

PULSE

GENERATOR 2

CLEAR

TRIGGER

TIE

INT

from interface:

clear TF

from interface:

clear AF

set alarm

flag AF

to interface:

read TF

TI_TP

AIE

e.g. AIE

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