LP3958

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SNVS423C – JANUARY 2006 – REVISED MARCH 2013

Electrical Characteristics

(1) (2)

Limits in standard typeface are for TJ = 25º C. Limits in boldface type apply over the operating ambient temperature range (-

30ºC < TA < +85ºC). Unless otherwise noted, specifications apply to the LP3958 Block Diagram with: VDD1,2 = 3.0 ... 5.5V,

CVDD = CVDDIO = 100nF, COUT = 2 x 4.7µF, CIN = 10µF, CVDDA = 1µF, CVREF = 100nF, L1 = 10µH, RKEY = 8.2kΩ and RRT =

82k

Ω

(3).

Symbol

Parameter

Test Conditions

Min

Typ

Max

Unit

IVDD

Standby supply current

NSTBY = L

1.7

7

µA

(VDD1, VDD2)

Register 0DH=08H (4)

No-boost supply current

NSTBY = H,

300

800

µA

(VDD1, VDD2)

EN_BOOST = L

No-load supply current

NSTBY = H,

750

1300

uA

(VDD1, VDD2)

EN_BOOST = H

Autoload OFF

VDDA

Output voltage of internal LDO

IVDDA = 1mA

2.80

V

-3

+3

%

VREF

Reference voltage (5)

1.23

V

(1)

All voltages are with respect to the potential at the GND pins.

(2)

Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the

most likely norm.

(3)

Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics.

(4)

Boost output voltage set to 8V (08H in register 0DH) to prevent any unneccessary current consumption.

(5)

No external loading allowed for VREF pin.

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