STM32F412RGT7PTR datasheet(32/201 Pages) STMICROELECTRONICS

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Functional overview

STM32F412xE/G

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DocID028087 Rev 7

or when the device wakes up from the Standby mode (see Section 3.21: Low-power

modes).

Additional 32-bit registers contain the programmable alarm subseconds, seconds, minutes,

hours, day, and date.

The RTC and backup registers are supplied through a switch that is powered either from the

VDD supply when present or from the VBAT pin.

3.21

Low-power modes

The devices support three low-power modes to achieve the best compromise between low

power consumption, short startup time and available wakeup sources:

•

Sleep mode

In Sleep mode, only the CPU is stopped. All peripherals continue to operate and can

wake up the CPU when an interrupt/event occurs.

To further reduce the power consumption, the Flash memory can be switched off

before entering in Sleep mode. Note that this requires a code execution from the RAM.

•

Stop mode

The Stop mode achieves the lowest power consumption while retaining the contents of

SRAM and registers. All clocks in the 1.2 V domain are stopped, the PLL, the HSI RC

and the HSE crystal oscillators are disabled. The voltage regulator can also be put

either in normal or in low-power mode.

The device can be woken up from the Stop mode by any of the EXTI line (the EXTI line

source can be one of the 16 external lines, the PVD output, the RTC alarm/ wakeup/

tamper/ time stamp events).

•

Standby mode

The Standby mode is used to achieve the lowest power consumption. The internal

voltage regulator is switched off so that the entire 1.2 V domain is powered off. The

PLL, the HSI RC and the HSE crystal oscillators are also switched off. After entering

Standby mode, the SRAM and register contents are lost except for registers in the

backup domain when selected.

The device exits the Standby mode when an external reset (NRST pin), an IWDG reset,

a rising edge on one of the WKUP pins, or an RTC alarm/ wakeup/ tamper/time stamp

event occurs.

Standby mode is not supported when the embedded voltage regulator is bypassed and

the 1.2 V domain is controlled by an external power.

3.22

VBAT operation

The VBAT pin allows to power the device VBAT domain from an external battery, an external

super-capacitor, or from VDD when no external battery and an external super-capacitor are

present.

VBAT operation is activated when VDD is not present.

The VBAT pin supplies the RTC and the backup registers.

Note:

When the microcontroller is supplied from VBAT, external interrupts and RTC alarm/events

do not exit it from VBAT operation. When PDR_ON pin is not connected to VDD (internal

STM32F412RGT7PTR 数据表(PDF) 32 Page - STMicroelectronics

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