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VS6724 数据表(PDF) 9 Page - STMicroelectronics |
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VS6724 数据表(HTML) 9 Page - STMicroelectronics |
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9 / 118 page ![]() VS6724 Overview 9/118 1.2 Signal description The VS6724 has 20 electrical connections which are described in Table 1. The package details and electrical pinout of the flex connector are shown in Figure 45 on page 115 and Figure 46 on page 116. Table 1. Signal description Pad name Type Description Reference voltage GND PWR Ground(1) 1. The two GND pins are connected together on the device substrate. HSYNC OUT Horizontal synchronization output VDD VSYNC OUT Vertical synchronization output VDD SCL IN I²C clock input VDD CLK IN Master clock input - 6.5MHz to 27MHz VDD SDA I/O I²C data line VDD VDD PWR Digital supply 1.8 V OR 2.8 V AVDD PWR Analogue supply 2.4 V to 3.0 V PCLK OUT Pixel qualification clock VDD CE IN Chip enable signal active HIGH VDD DO5 OUT Data output D5 VDD DO4 OUT Data output D4 VDD GND PWR Ground(1) DO3 OUT Data output D3 VDD DO2 OUT Data output D2 VDD DO1 OUT Data output D1 VDD DO0 OUT Data output D0 VDD DO6 OUT Data output D6 VDD DO7 OUT Data output D7 VDD FSO OUT Flash output VDD |
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