| 数据搜索系统,热门电子元器件搜索 |
|
STM32F412RGU7P 数据表(PDF) 84 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM32F412RGU7P 数据表(HTML) 84 Page - STMicroelectronics |
|
84 / 201 page ![]() Electrical characteristics STM32F412xE/G 84/201 DocID028087 Rev 7 Table 17. Features depending on the operating power supply range Operating power supply range ADC operation Maximum Flash memory access frequency with no wait states (fFlashmax) Maximum Flash memory access frequency with wait states (1)(2) I/O operation Clock output frequency on I/O pins(3) Possible Flash memory operations VDD =1.7 to 2.1 V(4) Conversion time up to 1.2 Msps 16 MHz(5) 100 MHz with 6 wait states – No I/O compensation up to 30 MHz 8-bit erase and program operations only VDD = 2.1 to 2.4 V Conversion time up to 1.2 Msps 18 MHz 100 MHz with 5 wait states – No I/O compensation up to 30 MHz 16-bit erase and program operations VDD = 2.4 to 2.7 V Conversion time up to 2.4 Msps 24 MHz 100 MHz with 4 wait states – I/O compensation works up to 50 MHz 16-bit erase and program operations VDD = 2.7 to 3.6 V(6) Conversion time up to 2.4 Msps 30 MHz 100 MHz with 3 wait states – I/O compensation works –up to 100 MHz when VDD = 3.0 to 3.6 V –up to 50 MHz when VDD = 2.7 to 3.0 V 32-bit erase and program operations 1. Applicable only when the code is executed from Flash memory. When the code is executed from RAM, no wait state is required. 2. Thanks to the ART accelerator and the 128-bit Flash memory, the number of wait states given here does not impact the execution speed from Flash memory since the ART accelerator allows to achieve a performance equivalent to 0 wait state program execution. 3. Refer to Table 59: I/O AC characteristics for frequencies vs. external load. 4. VDD/VDDA minimum value of 1.7 V, with the use of an external power supply supervisor (refer to Section 3.18.2: Internal reset OFF). 5. Prefetch available over the complete VDD supply range. 6. The voltage range for the USB full speed embedded PHY can drop down to 2.7 V. However the electrical characteristics of D- and D+ pins will be degraded between 2.7 and 3 V. |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |