ZSC31150

Fast Automotive Sensor Signal Conditioner

Data Sheet

August 31, 2010

© 2010 Zentrum Mikroelektronik Dresden AG — Rev. 1.07

All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without

the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without

notice.

14 of 24

Table 2.3:

Analog Output Resolution Versus Sample Rate

ADC

Adjustment

Approximated Output

Resolution

15

Sample Rate

fCON

16

Averaged

Bandwidth @

Order

Digital

Analog

fCLK=3MHz

fCLK=3MHz

fCLK=4MHz

rADC

fCLK=4MHz

[Bit]

[Bit]

[Bit]

OADC

[Hz]

[Hz]

[Hz]

[Hz]

13

13

12

345

460

130

172

14

14

12

178

237

67

89

Remark:

ADCs reference voltage ADCVREF is defined by the potential between <VBR_T> and <VBR_B> (or

<VDDA> to <VSSA>, if CFGAPP:BREF=1). The theoretically input range ADCRANGE_INP of the ADC

is equivalent to ADCs reference voltage.

In practice ADCs input range should be used in maximum from 10% to 90% of ADCRANGE_INP - a necessary

condition for abiding specified accuracy, stability and nonlinearity parameters of AFE. This condition is also

valid for whole temperature range and all applicable sensor tolerances. Inside of ZSC31150 is no failsafe task

implemented, which verifies abiding of this condition.

2.4.

Temperature Measurement

The ZSC31150 supports four different methods for temperature data acquiring needed for calibration of the

sensor signal in temperature range. Temperature data can be acquired using:



an internal pn-junction temperature sensor,



an external pn-junction temperature sensor connected to sensor top potential (VBRTOP),



an external resistive half bridge temperature sensor and



the temperature coefficient of the sensor bridge at bridge current excitation.

Refer 'ZSC31150 Functional Description' for a detailed explanation of temperature sensor adaptation and

adjustment.

15

ADC resolution should be one bit higher then applied output resolution, if AFE gain is adjusted in such manner, that input range is

used more than 50%. Otherwise ADC resolution should be more than one bit higher than applied output resolution.

16

The sampling rate (AD conversion time) is only a part of the whole cycle, refer “ZSC31150 bandwidth calculation sheet” for detailed

information

15

14

12

90

120

34

45

1

16

14

12

45

61

17

23

13

13

12

5859

7813

2203

2937

14

14

12

3906

5208

1469

1958

15

14

12

2930

3906

1101

1468

2

16

14

12

1953

2604

734

979