ZSC31150

Fast Automotive Sensor Signal Conditioner

Data Sheet

August 31, 2010

© 2010 Zentrum Mikroelektronik Dresden AG — Rev. 1.07

All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without

the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without

notice.

7 of 24

1.3.

Electrical Parameters

All parameter values are valid on behalf on in chapter 1.2 specified operating conditions (special definitions

excluded). All Voltages related to VSSA.

No.

Parameter

Symbol

Conditions

Min

Typ

Max

Unit

1.3.1. Supply Current and System Operation Conditions

1.3.1.1

Supply current

TADV

Without bridge and load

current, fCLK  3 MHz

5.5

mA

1.3.1.2

Clock frequency

TAMB_TQA

Guaranteed adjustment

range

2

1

3

4

1

MHz

1.3.2. Analog Front-End (AFE) Characteristics

1.3.2.1

Input Span

VIN_SP

Analog gain: 420 to 2.8

1

275

mV/V

1.3.2.2

Analog Offset

Compensation Range

Depends on gain adjust,

refer to chapter 2.3.2

-300

300

% VIN_SP

1.3.2.3

Parasitic differential input

offset current

1

IIN_OFF

Within TAMB;

Within TAMB_TQI

-10

-2

10

2

nA

nA

1.3.2.4

Common mode input

range

VIN_CM

Depends on gain adjust,

no XZC, refer to chapter

2.3.1

0.29 *

VDDA

0.65 *

VDDA

V

1.3.3. Temperature Measurement (refer chapter 2.4)

1.3.3.1

External temperature

diode channel gain

ATSED

300

1300

ppm FS

/ (mV/V)

1.3.3.2

External temperature

diode bias current

ITSE

6

10

20

A

1.3.3.3

External temperature

diode input range

1

0

1.5

V

1.3.3.4

External temperature

resistor channel gain

ATSER

1200

3500

ppm FS

/ (mV/V)

1.3.3.5

External temperature

resistor / input voltage

range

1

VTSER

0

600

mV/V

1.3.3.6

Internal temperature diode

sensitivity

STTSI

raw values – without

conditioning

700

2700

ppm FS

/ K

1.3.4. AD-Conversion

1.3.4.1

A/D Resolution

1

rADC

13

16

Bit

1.3.4.2

DNL

1

DNLADC

0.95

LSB

1.3.4.3

INL TQA

1

INLADC

4

LSB

1.3.4.4

INL TQE

INLADC

rADC =13Bit, fCLK=3MHz,

best fit, 2nd order,

complete AFE, 1.3.4.5

5

LSB

1.3.4.5

ADC Input Range

Range

10

90

%VDDA

1

No measurement in mass production, parameter is guaranteed by design and/or quality observation.