OC

PG

CASE

ON/OFF

RESET

Power Supply

Motor Controller

On/Off Switch

Case Tamper

Switch

Over Current

Detection

9

SN74HCS21-Q1

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SCLS761 – FEBRUARY 2020

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9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

9.1 Application Information

In this application, one channel of the SN74HCS21-Q1 is used as shown in Figure 9. The additional channel can

be used individually or the inputs can be grounded and the channel left unused.

The SN74HCS21-Q1 is used to drive the RESET pin of the system controller. When any of the inputs to the

gates become LOW, the controller will be disabled. The controller will only operate when all inputs are HIGH,

indicating normal operation.

9.2 Typical Application

Figure 9. Typical application block diagram

9.2.1 Design Requirements

•

All signals in the system operate at 5 V

•

All inputs must be HIGH for normal operation

•

Any input switching to LOW will force the output LOW

9.2.1.1 Power Considerations

Ensure the desired supply voltage is within the range specified in the Recommended Operating Conditions. The

supply voltage sets the device's electrical characteristics as described in the Electrical Characteristics.

The supply must be capable of sourcing current equal to the total current to be sourced by all outputs of the

SN74HCS21-Q1 plus the maximum supply current, ICC, listed in the Electrical Characteristics. The logic device

can only source or sink as much current as it is provided at the supply and ground pins, respectively. Be sure not

to exceed the maximum total current through GND or VCC listed in the Absolute Maximum Ratings.

The SN74HCS21-Q1 can drive a load with a total capacitance less than or equal to 50 pF connected to a high-

impedance CMOS input while still meeting all of the datasheet specifications. Larger capacitive loads can be

applied, however it is not recommended to exceed 70 pF.

Total power consumption can be calculated using the information provided in CMOS Power Consumption and

Cpd Calculation.

Thermal increase can be calculated using the information provided in Thermal Characteristics of Standard Linear

and Logic (SLL) Packages and Devices.