THS1206 datasheet(7/43 Pages) TI2

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THS1206EP

12BIT 6 MSPS, SIMULTANEOUS SAMPLING

ANALOGTODIGITAL CONVERTERS

SGLS126A − JULY 2002 − REVISED FEBRUARY 2003

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

timing specification of the single conversion mode†

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Clock cycle of the internal clock oscillator

159

167

175

1 analog input

1.5

×tc

Pulse width, CONVST

2 analog inputs

2.5

×tc

Pulse width, CONVST

3 analog inputs

3.5

×tc

4 analog inputs

4.5

×tc

tdA

Aperture time

1 analog input

×tc

Time between consecutive start of single conversion

2 analog inputs

×tc

Time between consecutive start of single conversion

3 analog inputs

×tc

4 analog inputs

×tc

1 analog input,

TL = 1

×tc

Delay time, DATA_AV becomes active for the trigger

2 analog inputs, TL = 2

×tc

Delay time, DATA_AV becomes active for the trigger

level condition: TRIG0 = 0, TRIG1 = 0

3 analog inputs, TL = 3

×tc

level condition: TRIG0 = 0, TRIG1 = 0

4 analog inputs, TL = 4

×tc

1 analog input,

TL = 4

×t2 +6×tc

td(DATA_AV)

Delay time, DATA_AV becomes active for the trigger

2 analog inputs, TL = 4

t2 +7×tc

td(DATA_AV)

Delay time, DATA_AV becomes active for the trigger

level condition: TRIG0 = 1, TRIG1 = 0

3 analog inputs, TL = 6

t2 +8×tc

level condition: TRIG0 = 1, TRIG1 = 0

4 analog inputs, TL = 8

t2 +9×tc

1 analog input,

TL = 8

×t2 +6×tc

Delay time, DATA_AV becomes active for the trigger

2 analog inputs, TL = 8

×t2 +7×tc

Delay time, DATA_AV becomes active for the trigger

level condition: TRIG0 = 0, TRIG1 = 1

3 analog inputs, TL = 9

×t2 +8×tc

level condition: TRIG0 = 0, TRIG1 = 1

4 analog inputs, TL = 12

×t2 +9×tc

Delay time, DATA_AV becomes active for the trigger

1 analog input,

TL = 14

×t2 +6×tc

td(DATA_AV)

Delay time, DATA_AV becomes active for the trigger

level condition: TRIG0 = 1, TRIG1 = 1

2 analog inputs, TL = 12

×t2 +7×tc

td(DATA_AV)

level condition: TRIG0 = 1, TRIG1 = 1

3 analog inputs, TL = 12

×t2 +8×tc

† Timing parameters are ensured by design but are not tested.

THS1206 数据表(PDF) 7 Page - Texas Instruments

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