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STM32F427NET6TR 数据表(PDF) 18 Page - STMicroelectronics |
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STM32F427NET6TR 数据表(HTML) 18 Page - STMicroelectronics |
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18 / 231 page ![]() Description STM32F427xx STM32F429xx 18/231 DocID024030 Rev 6 Figure 4. STM32F427xx and STM32F429xx block diagram 1. The timers connected to APB2 are clocked from TIMxCLK up to 180 MHz, while the timers connected to APB1 are clocked from TIMxCLK either up to 90 MHz or 180 MHz depending on TIMPRE bit configuration in the RCC_DCKCFGR register. 2. The LCD-TFT is available only on STM32F429xx devices. |
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