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STM32F427NET7 数据表(PDF) 166 Page - STMicroelectronics |
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STM32F427NET7 数据表(HTML) 166 Page - STMicroelectronics |
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166 / 231 page ![]() Electrical characteristics STM32F427xx STM32F429xx 166/231 DocID024030 Rev 6 Figure 56. Asynchronous non-multiplexed SRAM/PSRAM/NOR write waveforms 1. Mode 2/B, C and D only. In Mode 1, FMC_NADV is not used. Table 88. Asynchronous non-multiplexed SRAM/PSRAM/NOR write timings(1)(2) 1. CL = 30 pF. 2. Guaranteed by characterization results. Symbol Parameter Min Max Unit tw(NE) FMC_NE low time 3THCLK 3THCLK+1 ns tv(NWE_NE) FMC_NEx low to FMC_NWE low THCLK − 0.5 THCLK+ 0.5 ns tw(NWE) FMC_NWE low time THCLK THCLK+ 0.5 ns th(NE_NWE) FMC_NWE high to FMC_NE high hold time THCLK +1.5 - ns tv(A_NE) FMC_NEx low to FMC_A valid - 0 ns th(A_NWE) Address hold time after FMC_NWE high THCLK+0.5 - ns tv(BL_NE) FMC_NEx low to FMC_BL valid - 1.5 ns th(BL_NWE) FMC_BL hold time after FMC_NWE high THCLK+0.5 - ns tv(Data_NE) Data to FMC_NEx low to Data valid - THCLK+ 2 ns th(Data_NWE) Data hold time after FMC_NWE high THCLK+0.5 - ns tv(NADV_NE) FMC_NEx low to FMC_NADV low - 0.5 ns tw(NADV) FMC_NADV low time - THCLK+ 0.5 ns |
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