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STM32F427NET7 数据表(PDF) 229 Page - STMicroelectronics |
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STM32F427NET7 数据表(HTML) 229 Page - STMicroelectronics |
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229 / 231 page ![]() DocID024030 Rev 6 229/231 STM32F427xx STM32F429xx Revision history 230 19-Feb-2015 5 Update SPI/IS2 in Table 2: STM32F427xx and STM32F429xx features and peripheral counts. Updated LQFP208 in Table 4: Regulator ON/OFF and internal reset ON/OFF availability. Updated Figure 19: Memory map. Changed PLS[2:0]=101 (falling edge) maximum value in Table 22: reset and power control block characteristics. Updated current consumption with all peripherals disabled in Table 24: Typical and maximum current consumption in Run mode, code with data processing running from Flash memory (ART accelerator enabled except prefetch) or RAM. Updated note 1. in Table 28: Typical and maximum current consumptions in Standby mode. Updated tWUSTOP in Table 36: Low-power mode wakeup timings. Updated ESD standards and Table 53: ESD absolute maximum ratings. Updated Table 56: I/O static characteristics. Section : I2C interface characteristics: updated section introduction, removed Table I2C characteristics, Figure I2C bus AC waveforms and measurement circuit and Table SCL frequency; added Table 61: I2C analog filter characteristics. Updated measurement conditions in Table 62: SPI dynamic characteristics. Updated Figure 51: Typical connection diagram using the ADC. Updated Section : Device marking for LQFP100. Updated Figure 83: WLCSP143 - 143-pin, 4.521x 5.547 mm, 0.4 mm pitch wafer level chip scale package outline and Table 111: WLCSP143 - 143-pin, 4.521x 5.547 mm, 0.4 mm pitch wafer level chip scale package mechanical data; added Figure 84: WLCSP143 - 143-pin, 4.521x 5.547 mm, 0.4 mm pitch wafer level chip scale recommended footprint and Table 112: WLCSP143 recommended PCB design rules (0.4 mm pitch). Updated Figure 85: WLCSP143 marking example (package top view) and related note. Updated Section : Device marking for WLCSP143. Updated Section : Device marking for LQFP144. Updated Section : Device marking for LQFP176. Updated Figure 92: LQFP208 - 208-pin, 28 x 28 mm low-profile quad flat package outline; Updated Section : Device marking for LQFP208. Modified UFBGA169 pitch, updated Figure 95: UFBGA169 - 169-ball 7 x 7 mm 0.50 mm pitch, ultra fine pitch ball grid array package outline and Table 116: UFBGA169 - 169-ball 7 x 7 mm 0.50 mm pitch, ultra fine pitch ball grid array package mechanical data; updated Section : Device marking for LQFP208. updated Section : Device marking for UFBGA169, Section : Device marking for UFBGA176+25 and Section : Device marking for TFBGA176. Updated Z pin count in Table 122: Ordering information scheme. Table 124. Document revision history Date Revision Changes |
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