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TLV117118DCYR 数据表(PDF) 4 Page - Texas Instruments |
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TLV117118DCYR 数据表(HTML) 4 Page - Texas Instruments |
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4 / 18 page ![]() VOUT VIN 2 3 1 GND Current Limit Bandgap Thermal Shutdown IN OUT LOGIC GND TLV1171 Series UVLO TLV1171 SBVS177 – APRIL 2012 www.ti.com PIN CONFIGURATION DCY PACKAGE SOT223 (TOP VIEW) PIN DESCRIPTIONS NAME PIN DESCRIPTION GND 2, Tab Ground pin Input pin. IN 1 See the Input and Output Capacitor Requirements section for more details. Regulated output voltage pin. OUT 3 See the Input and Output Capacitor Requirements section for more details. FUNCTIONAL BLOCK DIAGRAM Figure 1. Block Diagram 4 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated |
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