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PM6680ATR 数据表(PDF) 35 Page - STMicroelectronics |
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PM6680ATR 数据表(HTML) 35 Page - STMicroelectronics |
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35 / 48 page ![]() PM6680A Design guidelines 35/48 9.6 Closing the integrator loop The design of external feedback network depends on the output voltage ripple. If the ripple is higher than approximately 30 mV, the feedback network (Figure 36) is usually enough to keep the loop stable. Figure 36. Circuitry for output ripple compensation The stability of the system depends firstly on the output capacitor zero frequency. The following condition should be satisfied: Equation 23 where k is a design parameter greater than 3 and Rout is the ESR of the output capacitor. It determinates the minimum integrator capacitor value CINT: Equation 24 where gm = 50 µs is the integrator transconductance. + - V Vrr C CO OM MP P g gm m O OU UT T V Vrr + P PW WM M C Co om mp pa arra atto orr C CIIN NT T R RIIN NT T C CFFIILLTT t Vr C CO OU UT T COMP PIN VOLTAGE L L D D OUTPUT VOLTAGE I=gm(V1-Vr) V V1 1 t ?V ?V V VC CIIN NT T R RO OU UT T F FB B R R11 R R22 ∆ ∆ out out Zout sw R C 2 k f k f × × π = × > OUT Zout sw m INT V Vr f k f 2 g C × ⎟⎟ ⎠ ⎞ ⎜⎜ ⎝ ⎛ − × π > |
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